MCF52221CAF80 Freescale Semiconductor, MCF52221CAF80 Datasheet - Page 40

• Manufacturer Part Number: MCF52221CAF80
• Description: IC MCU 128K FLASH 80MHZ 100-LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF5222xr

Specifications of MCF52221CAF80

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, SPI, UART/USART, USB OTG
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: MCF522x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: I2C/QSPI/UART/USB
• Maximum Clock Frequency: 80 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 10
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52221DEMO, M52223EVB
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Package: 100LQFP
• Device Core: ColdFire
• Family Name: MCF5222x
• Maximum Speed: 80 MHz
• Operating Supply Voltage: 3.3 V
• For Use With: M52221DEMO - BOARD DEMO FOR MCF52221
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

2.16
Freescale Semiconductor
1
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
Num
JTAG_EN is expected to be a static signal. Hence, it is not associated with any timing.
QSPI_CS[3:0]
QSPI_DOUT
QSPI_CLK
QSPI_DIN
JTAG and Boundary Scan Timing
TCLK frequency of operation
TCLK cycle period
TCLK clock pulse width
TCLK rise and fall times
Boundary scan input data setup time to TCLK rise
Boundary scan input data hold time after TCLK rise
TCLK low to boundary scan output data valid
TCLK low to boundary scan output high Z
TMS, TDI input data setup time to TCLK rise
TMS, TDI Input data hold time after TCLK rise
TCLK low to TDO data valid
TCLK low to TDO high Z
TRST assert time
TRST setup time (negation) to TCLK high
QS1
QS3
Characteristics
Table 38. JTAG and Boundary Scan Timing
MCF52223 ColdFire Microcontroller, Rev. 3
QS2
Figure 10. QSPI Timing
1
Symbol
t
t
t
t
t
t
t
t
TAPBST
TAPBHT
TRSTST
TRSTAT
TDODZ
f
t
BSDST
BSDHT
t
t
TDODV
t
t
JCYC
JCYC
BSDV
BSDZ
JCRF
JCW
QS4
4  t
Min
100
DC
26
26
10
10
0
4
0
0
4
0
0
CYC
QS5
Electrical Characteristics
Max
1/4
33
33
26
—
—
—
—
—
—
—
—
3
8
f
Unit
sys/2
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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