M30624FGAFP#U5 Renesas Electronics America, M30624FGAFP#U5 Datasheet - Page 574

IC M16C MCU FLASH 100QFP

M30624FGAFP#U5

Manufacturer Part Number
M30624FGAFP#U5
Description
IC M16C MCU FLASH 100QFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheets

Specifications of M30624FGAFP#U5

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-QFP
Cpu Family
M16C
Device Core Size
16/32Bit
Frequency (max)
16MHz
Interface Type
SIM/UART
Total Internal Ram Size
20KB
# I/os (max)
87
Number Of Timers - General Purpose
11
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.2V
On-chip Adc
10-chx10-bit
On-chip Dac
2-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-20C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
100
Package Type
PQFP
For Use With
867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Appendix 1
Checks regarding the timer
Checks regarding Interrupt
Checks regarding low voltage and low power consumption
Checks regarding A-D converter
Does not instruction DMA transfer occur between the instruction writing is enabled in the protect
register and the instruction writing in the port P9 direction register starts?
Is writing enabled in the protect register before writing in the SI/Oi (i=3,4) control register (address
0362
Is writing effectuated in the SI/Oi (i=3,4) control register by the next instruction after writing is enabled
in the protect register?
Does not an interrupt generate between the instruction writing is enabled in the protect register and
the instruction writing in the SI/Oi (i=3,4) control register?
Does not instruction DMA transfer occur between the instruction writing is enabled in the protect
register and the instruction writing in the SI/Oi (i=3,4) control register starts?
Is the timer started after a value is set in the timer register?
When rewrite the interrupt register, do so at a point that does not generate the interruput request?
When using at low voltage, have you checked recommended operating conditions and changed the
wait bit (address 0005
Does the oscillator to which the count source is going to be switched be oscillating stably, before the
count source for BCLK can be changed from XIN to XCIN or vice versa?
In the low power consumption mode, does not current flow from Vref when the Vref connection bit (bit
5 in address 03D7
Is not voltage level of port floating in the low power consumption mode?
Have you selected other than fAD (no dividing) for øAD when using the A-D converter at V
to 4.0V?
Have you selected no sample & hold function when using the A-D converter at V
Have you selected 8-bit mode when using the A-D converter at V
Does øAD use it by less than 10MH
16
, 0366
16
)?
16
) is set?
16
, bit 7) to “1”?
Z
?
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
CC
= 2.7V to 4.0V?
CC
M16C / 62A Group
Mitsubishi microcomputers
= 2.7V to 4.0V?
CC
= 2.7V
2-255

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