PIC12F615-E/MF Microchip Technology, PIC12F615-E/MF Datasheet - Page 68
![no-image](/images/manufacturer_photos/0/4/439/microchip_technology_sml.jpg)
PIC12F615-E/MF
Manufacturer Part Number
PIC12F615-E/MF
Description
IC PIC MCU FLASH 1KX14 8DFN
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F609T-ISN.pdf
(212 pages)
2.PIC12F609T-ISN.pdf
(26 pages)
3.PIC12F609T-ISN.pdf
(8 pages)
4.PIC12F615-EMF.pdf
(196 pages)
Specifications of PIC12F615-E/MF
Program Memory Type
FLASH
Program Memory Size
1.75KB (1K x 14)
Package / Case
8-DFN
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
5
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC12F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
5
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
APGRD004 - REF DESIGN MOD AUTO AMBNT LIGHTAC164324 - MODULE SKT FOR MPLAB 8DFN/16QFN
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC12F609T-ISN PDF datasheet
- PIC12F609T-ISN PDF datasheet #2
- PIC12F609T-ISN PDF datasheet #3
- PIC12F615-EMF PDF datasheet #4
- Current page: 68 of 196
- Download datasheet (3Mb)
PIC12F609/615/12HV609/615
TABLE 8-2:
DS41302B-page 66
ANSEL
CMCON0
CMCON1
INTCON
PIE1
PIR1
GPIO
TRISIO
VRCON
Legend:
Note 1:
Name
x
For PIC12F615/HV615 only.
CMVREN
CMON
= unknown,
Bit 7
GIE
—
—
—
—
—
—
SUMMARY OF REGISTERS ASSOCIATED WITH THE COMPARATOR AND VOLTAGE
REFERENCE MODULES
ADCS2
u
ADIE
ADIF
COUT
Bit 6
PEIE
= unchanged,
—
—
—
—
(1)
(1)
(1)
CCP1IE
CCP1IF
ADCS1
TRISIO5
CMOE
Bit 5
T0IE
VRR
GP5
—
-
= unimplemented, read as ‘0’. Shaded cells are not used for comparator.
(1)
(1)
(1)
ADCS0
TRISIO4
CMPOL
FVREN
T1ACS
INTE
Bit 4
GP4
—
—
(1)
TRISIO3
CMHYS
ANS3
GPIE
CMIE
CMIF
Bit 3
GP3
VR3
—
TRISIO2
ANS2
Bit 2
CMR
T0IF
GP2
VR2
—
—
—
(1)
TMR2IE
TMR2IF
TRISIO1
T1GSS
ANS1
INTF
Bit 1
GP1
VR1
—
(1)
(1)
CMSYNC
TRISIO0
TMR1IE
TMR1IF
CMCH
ANS0
GPIF
Bit 0
GP0
VR0
© 2008 Microchip Technology Inc.
0000 000x
-000 1111
0000 -000
0000 0000
-00- 0-00
-00- 0-00
--xx xxxx
--11 1111
0-00 0000
POR, BOR
Value on
0000 000x
-000 1111
0000 -000
0000 0000
-00- 0-00
-00- 0-00
--uu uuuu
--11 1111
0-00 0000
Value on
all other
Resets
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