ATTINY13A-SHR Atmel, ATTINY13A-SHR Datasheet - Page 34

• Manufacturer Part Number: ATTINY13A-SHR
• Description: MCU AVR 1KB FLASH 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY13A-SHR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 1KB (512 x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Package: 8SOIC EIAJ
• Device Core: AVR
• Family Name: ATtiny
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 6
• Interface Type: SPI
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 1
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: Details

7.5.3
34
ATtiny13A
PRR – Power Reduction Register
• Bits 4:3 – SM[1:0]: Sleep Mode Select Bits 1:0
These bits select between the three available sleep modes as shown in
Table 7-2.
The Power Reduction Register provides a method to reduce power consumption by allowing
peripheral clock signals to be disabled.
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read as zero.
• Bit 1 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
• Bit 0 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot be used when the ADC is shut down.
Bit
0x25
Read/Write
Initial Value
SM1
0
0
1
1
Sleep Mode Select
R
7
–
0
SM0
R
6
–
0
0
1
0
1
R
5
–
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Reserved
R
4
–
0
R
3
–
0
R
2
–
0
PRTIM0
R/W
Table 7-2 on page
1
0
PRADC
R/W
0
0
8126E–AVR–07/10
PRR
34.