PIC16F57-I/SP Microchip Technology, PIC16F57-I/SP Datasheet - Page 21

• Manufacturer Part Number: PIC16F57-I/SP
• Description: IC MCU FLASH 2KX12 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F57-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 3KB (2K x 12)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 20
• Ram Size: 72 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 72 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DV164120, DV164101, ICE2000
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 2 K
• Height: 3.3 mm
• Length: 34.67 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164001 - MODULE SKT PROMATEII 18/28DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.6
The PIC16F54 device has a 9-bit wide, two-level hard-
ware PUSH/POP stack and the PIC16F57 device has
an 11-bit wide, two-level hardware PUSH/POP stack.
A CALL instruction will PUSH the current value of
Stack 1 into Stack 2 and then PUSH the current
program counter value, incremented by one, into Stack
Level 1. If more than two sequential CALLs are
executed, only the most recent two return addresses
are stored.
A RETLW instruction will POP the contents of Stack
Level 1 into the program counter and then copy Stack
Level 2 contents into Level 1. If more than two sequen-
tial RETLWs are executed, the stack will be filled with
the address previously stored in Level 2.
For the RETLW instruction, the PC is loaded with the
Top-of-Stack (TOS) contents. All of the devices
covered in this data sheet have a two-level stack. The
stack has the same bit width as the device PC,
therefore, paging is not an issue when returning from a
subroutine.
3.7
The INDF register is not a physical register. Addressing
INDF actually addresses the register whose address is
contained in the FSR Register (FSR is a pointer). This
is indirect addressing.
 2004 Microchip Technology Inc.
Note:
Stack
Indirect Data Addressing; INDF
and FSR Registers
The W Register will be loaded with the
literal value specified in the instruction.
This
implementation of data look-up tables
within the program memory.
is
particularly
useful
for
the
Preliminary
EXAMPLE 3-1:
• Register file 08 contains the value 10h
• Register file 09 contains the value 0Ah
• Load the value 08 into the FSR register
• A read of the INDF register will return the value
• Increment the value of the FSR register by one
• A read of the INDF register now will return the
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although Status bits may be affected).
A simple program to clear RAM locations 10h-1Fh
using indirect addressing is shown in Example 3-2.
EXAMPLE 3-2:
The FSR is either a 5-bit (PIC16F54) or 7-bit
(PIC16F57) wide register. It is used in conjunction with
the INDF register to indirectly address the data memory
area.
The FSR<4:0> bits are used to select data memory
addresses 00h to 1Fh.
NEXT
CONTINUE
PIC16F54: These do not use banking. FSR<6:5> bits
are unimplemented and read as ‘1’s.
PIC16F57: FSR<6:5> are the bank select bits and are
used to select the bank to be addressed (00 = Bank 0,
01 = Bank 1, 10 = Bank 2, 11 = Bank 3).
of 10h
(FSR = 09h)
value of 0Ah.
MOVLW
MOVWF
CLRF
INCF
BTFSC
GOTO
INDIRECT ADDRESSING
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
H'10' ;initialize pointer
FSR
INDF
FSR,F ;inc pointer
FSR,4 ;all done?
NEXT
PIC16F5X
;to RAM
;clear INDF Register
;NO, clear next
:;YES, continue
DS41213B-page 19