PIC16F57-I/SP Microchip Technology, PIC16F57-I/SP Datasheet - Page 31

• Manufacturer Part Number: PIC16F57-I/SP
• Description: IC MCU FLASH 2KX12 28-DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F57-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 3KB (2K x 12)
• Package / Case: 28-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 20
• Ram Size: 72 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 72 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 20
• Number Of Timers: 1
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DV164120, DV164101, ICE2000
• Minimum Operating Temperature: - 40 C
• Data Rom Size: 2 K
• Height: 3.3 mm
• Length: 34.67 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 7.24 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164001 - MODULE SKT PROMATEII 18/28DIP
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

6.0
As with any other register, the I/O registers can be
written and read under program control. However, read
instructions (e.g., MOVF PORTB, W) always read the I/O
pins independent of the pin’s Input/Output modes. On
Reset, all I/O ports are defined as input (inputs are at
high-impedance) since the I/O control registers
(TRISA, TRISB, TRISC) are all set.
6.1
PORTA is a 4-bit I/O register. Only the low order 4 bits
are used (RA<3:0>). Bits 7-4 are unimplemented and
read as ‘0’s.
6.2
PORTB is an 8-bit I/O register (PORTB<7:0>).
6.3
PORTC is an 8-bit I/O register (PORTC<7:0>) for the
PIC16F57.
PORTC is a general purpose register for the
PIC16F54.
6.4
The Output Driver Control registers are loaded with the
contents of the W register by executing the TRIS f
instruction. A ‘1’ from a TRIS register bit puts the corre-
sponding output driver in a high-impedance (Input)
mode. A ‘0’ puts the contents of the output data latch
on the selected pins, enabling the output buffer.
The TRIS registers are “write-only” and are set (output
drivers disabled) upon Reset.
TABLE 6-1:
 2004 Microchip Technology Inc.
N/A
05h
06h
07h
Legend:
Note 1:
Address
Note:
I/O PORTS
PORTA
PORTB
PORTC
TRIS Registers
Shaded cells = unimplemented, read as ‘0’, — = unimplemented, read as ‘0’,
File address 07h is a general purpose register on the PIC16F54.
A read of the ports reads the pins, not the
output data latches. That is, if an output
driver on a pin is enabled and driven high,
but the external system is holding it low, a
read of the port will indicate that the pin is
low.
TRIS
PORTA
PORTB
PORTC
Name
SUMMARY OF PORT REGISTERS
(1)
I/O Control Registers (TRISA, TRISB, TRISC)
Bit 7
RB7
RC7
—
Bit 6
RC6
RB6
—
Bit 5
RB5
RC5
—
Preliminary
Bit 4
RB4
RC4
—
Bit 3
RA3
RB3
RC3
6.5
The equivalent circuit for an I/O port pin is shown in
Figure 6-1. All ports may be used for both input and
output operation. For input operations, these ports are
non-latching. Any input must be present until read by
an input instruction (e.g., MOVF PORTB, W). The out-
puts are latched and remain unchanged until the output
latch is rewritten. To use a port pin as output, the
corresponding direction control bit (in TRISA, TRISB
and TRISC) must be cleared (= 0). For use as an input,
the corresponding TRIS bit must be set. Any I/O pin
can be programmed individually as input or output.
FIGURE 6-1:
Data
Bus
WR
Port
W
Reg
TRIS ‘f’
Bit 2
RC2
RA2
RB2
I/O Interfacing
D
D
Bit 1
CK
CK
RC1
RA1
RB1
Reset
TRIS
Latch
Data
Latch
x
= unknown,
Q
Q
Q
Q
Bit 0
RA0
RB0
RC0
EQUIVALENT CIRCUIT
FOR A SINGLE I/O PIN
RD Port
PIC16F5X
1111 1111
---- xxxx
xxxx xxxx
xxxx xxxx
u
Power-on
Value on
= unchanged
Reset
Q
DS41213B-page 29
E
V
V
P
N
D
SS
DD
1111 1111
---- uuuu
uuuu uuuu
uuuu uuuu
WDT Reset
MCLR and
Value on
V
V
DD
SS
I/O
pin