PIC16F631-E/SO Microchip Technology, PIC16F631-E/SO Datasheet - Page 125

IC PIC MCU FLASH 1KX14 20SOIC

PIC16F631-E/SO

Manufacturer Part Number
PIC16F631-E/SO
Description
IC PIC MCU FLASH 1KX14 20SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F631-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
18
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SOIC (7.5mm Width)
For Use With
658-1047-5 - BOARD EVALUATION ACCESSTOUCHAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC164039 - MODULE SKT PROMATE II 20DIP/SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Connectivity
-
10.1.4
To read a program memory location, the user must
write the Least and Most Significant address bits to the
EEADR and EEADRH registers, set the EEPGD con-
trol bit of the EECON1 register, and then set control bit
RD. Once the read control bit is set, the program mem-
ory Flash controller will use the second instruction
cycle to read the data. This causes the second instruc-
tion immediately following the “BSF
instruction to be ignored. The data is available in the
very next cycle, in the EEDAT and EEDATH registers;
therefore, it can be read as two bytes in the following
instructions.
EXAMPLE 10-3:
© 2008 Microchip Technology Inc.
;
;
BANKSEL EEADR
MOVF
MOVWF
MOVF
MOVWF
BANKSEL EECON1
BSF
BSF
NOP
BANKSEL EEDAT
MOVF
MOVWF
MOVF
MOVWF
BANKSEL 0x00
NOP
READING THE FLASH PROGRAM
MEMORY (PIC16F685/PIC16F689/
PIC16F690)
MS_PROG_EE_ADDR, W
EEADRH
LS_PROG_EE_ADDR, W
EEADR
EECON1, EEPGD
EECON1, RD
EEDAT, W
LOWPMBYTE
EEDATH, W
HIGHPMBYTE
FLASH PROGRAM READ
PIC16F631/677/685/687/689/690
EECON1,RD”
;
;
;MS Byte of Program Address to read
;
;LS Byte of Program Address to read
;
;Point to PROGRAM memory
;EE Read
;First instruction after BSF EECON1,RD executes normally
;Any instructions here are ignored as program
;memory is read in second cycle after BSF EECON1,RD
;
;W = LS Byte of Program Memory
;
;W = MS Byte of Program EEDAT
;
;Bank 0
EEDAT and EEDATH registers will hold this value until
another read or until it is written to by the user.
Note 1: The two instructions following a program
2: If the WR bit is set when EEPGD = 1, it
memory read are required to be NOPs.
This prevents the user from executing a
two-cycle
instruction after the RD bit is set.
will be immediately reset to ‘0’ and no
operation will take place.
instruction
DS41262E-page 123
on
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