PIC16F688-E/ST Microchip Technology, PIC16F688-E/ST Datasheet - Page 144

• Manufacturer Part Number: PIC16F688-E/ST
• Description: IC MCU FLASH 4KX14 14TSSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F688-E/ST

• Program Memory Type: FLASH
• Program Memory Size: 7KB (4K x 14)
• Package / Case: 14-TSSOP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SCI/USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 0.9 mm
• Length: 5 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 4.4 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT14SS-1 - SOCKET TRANSITION 14DIP/14SSOPAC162061 - HEADER INTRFC MPLAB ICD2 20PINAC162056 - HEADER INTERFACE ICD2 16F688
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PICmicro MID-RANGE MCU FAMILY
9.2
DS31009A-page 9-4
PORTA and the TRISA Register
The RA4 pin is a Schmitt Trigger input and an open drain output. All other RA port pins have TTL
input levels and full CMOS output drivers. All pins have data direction bits (TRIS registers) which
can configure these pins as output or input.
Setting a TRISA register bit puts the corresponding output driver in a hi-impedance mode. Clear-
ing a bit in the TRISA register puts the contents of the output latch on the selected pin(s).
Example 9-1: Initializing PORTA
Figure 9-2: Block Diagram of RA3:RA0 and RA5 Pins
WR PORT
WR TRIS
RD PORT
Data bus
CLRF
CLRF
BSF
MOVLW
MOVWF
To Peripheral Module(s)
Note: I/O pin has protection diodes to V
STATUS
PORTA
STATUS, RP0
0xCF
TRISA
Data Latch
TRIS Latch
D
CK
D
CK
RD TRIS
Q
Q
Q
Q
; Bank0
; Initialize PORTA by clearing output
;
; Select Bank1
; Value used to initialize data direction
; PORTA<3:0> = inputs PORTA<5:4> = outputs
;
data latches
TRISA<7:6> always read as '0'
DD
and V
Q
SS
EN
.
D
V
V
P
N
DD
SS
Analog
input
mode
1997 Microchip Technology Inc.
TTL
or ST
input
buffer
I/O pin