ATTINY48-MUR Atmel, ATTINY48-MUR Datasheet - Page 155

• Manufacturer Part Number: ATTINY48-MUR
• Description: MCU AVR 4KB FLASH 12MHZ 32QFN
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY48-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 4KB (2K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 64 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8008G–AVR–04/11
Figure 15-20. An Arbitration Example
Several different scenarios may arise during arbitration, as described below:
This is summarized in
Figure 15-21. Possible Status Codes Caused by Arbitration
• Two or more masters are performing identical communication with the same Slave. In this
• Two or more masters are accessing the same Slave with different data or direction bit. In this
• Two or more masters are accessing different slaves. In this case, arbitration will occur in the
START
case, neither the Slave nor any of the masters will know about the bus contention.
case, arbitration will occur, either in the READ/WRITE bit or in the data bits. The masters
trying to output a one on SDA while another Master outputs a zero will lose the arbitration.
Losing masters will switch to not addressed Slave mode or wait until the bus is free and
transmit a new START condition, depending on application software action.
SLA bits. Masters trying to output a one on SDA while another Master outputs a zero will lose
the arbitration. Masters losing arbitration in SLA will switch to Slave mode to check if they are
being addressed by the winning Master. If addressed, they will switch to SR or ST mode,
depending on the value of the READ/WRITE bit. If they are not being addressed, they will
switch to not addressed Slave mode or wait until the bus is free and transmit a new START
condition, depending on application software action.
SDA
SCL
Address / General Call
Direction
received
Own
TRANSMITTER
Device 1
Figure
Yes
MASTER
Arbitration lost in SLA
SLA
Write
Read
15-21. Possible status values are given in circles.
TRANSMITTER
Device 2
No
MASTER
Device 3
RECEIVER
SLAVE
68/78
38
B0
Arbitration lost in Data
........
TWI bus will be released and not addressed slave mode will be entered
A START condition will be transmitted when the bus becomes free
Data byte will be received and NOT ACK will be returned
Data byte will be received and ACK will be returned
Last data byte will be transmitted and NOT ACK should be received
Data byte will be transmitted and ACK should be received
Device n
Data
V
CC
R1
ATtiny48/88
R2
STOP
155