ATTINY261A-MN Atmel, ATTINY261A-MN Datasheet - Page 119
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ATTINY261A-MN
Manufacturer Part Number
ATTINY261A-MN
Description
IC MCU AVR 2K FLASH 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY261A-MN
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Processor Series
ATtiny
Core
AVR
Data Bus Width
8 bit
Data Ram Size
128 B, 256 B, 512 B
Interface Type
SPI, USI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 105 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATTINY261A-MN
Manufacturer:
Atmel
Quantity:
771
- Current page: 119 of 292
- Download datasheet (9Mb)
12.12.7
12.12.8
12.12.9
8197B–AVR–01/10
TCNT1 – Timer/Counter1
TC1H – Timer/Counter1 High Byte
OCR1A – Timer/Counter1 Output Compare Register A
This 8-bit register contains the value of Timer/Counter1.
The Timer/Counter1 is realized as a 10-bit up/down counter with read and write access. Due to
synchronization of the CPU, Timer/Counter1 data written into Timer/Counter1 is delayed by one
and half CPU clock cycles in synchronous mode and at most one CPU clock cycles for asyn-
chronous mode. When a 10-bit accuracy is preferred, special procedures must be followed for
accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures are
described in section
can be used as an 8-bit Timer/Counter. Note that the Timer/Counter1 always starts counting up
after writing the TCNT1 register.
The temporary Timer/Counter1 register is an 2-bit read/write register.
• Bits 7:2 - Res: Reserved Bits
These bits are reserved and always reads zero.
• Bits 1:0 - TC19, TC18: Two MSB bits of the 10-bit accesses
If 10-bit accuracy is used, the Timer/Counter1 High Byte Register (TC1H) is used for temporary
storing the MSB bits (TC19, TC18) of the 10-bit acceses. The same TC1H register is shared
between all 10-bit registers within the Timer/Counter1. Note that special procedures must be fol-
lowed when accessing the 10-bit TCNT1 register via the 8-bit AVR data bus. These procedures
are described in section
The output compare register A is an 8-bit read/write register.
The Timer/Counter Output Compare Register A contains data to be continuously compared with
Timer/Counter1. Actions on compare matches are specified in TCCR1A. A compare match does
only occur if Timer/Counter1 counts to the OCR1A value. A software write that sets TCNT1 and
OCR1A to the same value does not generate a compare match.
A compare match will set the compare interrupt flag OCF1A after a synchronization delay follow-
ing the compare event.
Note that, if 10-bit accuracy is used special procedures must be followed when accessing the
internal 10-bit Ouput Compare Registers via the 8-bit AVR data bus. These procedures are
described in section
Bit
0x2E (0x4E)
Read/Write
Initial value
Bit
0x25 (0x45)
Read/Write
Initial value
Bit
0x2D (0x4D)
Read/Write
Initial value
MSB
MSB
R/W
R/W
R
7
0
7
0
7
0
-
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
“Accessing 10-Bit Registers” on page
R/W
R/W
R
6
0
6
0
6
0
-
R/W
R/W
R
5
0
5
0
5
0
-
R/W
R/W
R
4
0
4
0
4
0
-
R/W
R/W
R
3
0
3
0
3
0
-
106. Alternatively the Timer/Counter1
106.
R/W
R/W
106.
R
2
0
2
0
2
0
-
TC19
R/W
R/W
R/W
1
0
1
0
1
0
TC18
LSB
LSB
R/W
R/W
R/W
0
0
0
0
0
0
OCR1A
TCNT1
TC1H
119
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