PIC24F04KA201T-I/MQ Microchip Technology, PIC24F04KA201T-I/MQ Datasheet - Page 55

• Manufacturer Part Number: PIC24F04KA201T-I/MQ
• Description: IC PIC MCU FLASH 512KX4 20-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F04KA201T-I/MQ

• Program Memory Type: FLASH
• Program Memory Size: 4KB (1.375K x 24)
• Package / Case: 20-QFN
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 18
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 512 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 6-1:
TABLE 6-1:
6.1
If clock switching is enabled, the system clock source at
device Reset is chosen as shown in Table 6-2. If clock
switching is disabled, the system clock source is always
selected according to the oscillator Configuration bits.
Refer to Section 8.0 “Oscillator Configuration” for
further details.
© 2009 Microchip Technology Inc.
bit 0
Note 1:
TRAPR (RCON<15>)
IOPUWR (RCON<14>)
CM (RCON<9>)
EXTR (RCON<7>)
SWR (RCON<6>)
WDTO (RCON<4>)
SLEEP (RCON<3>)
IDLE (RCON<2>)
BOR (RCON<1>)
POR (RCON<0>)
DPSLP (RCON<10>)
Note:
2:
Clock Source Selection at Reset
All Reset flag bits may be set or cleared by the user software.
Flag Bit
All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
POR: Power-on Reset Flag bit
1 = A Power-up Reset has occurred
0 = A Power-up Reset has not occurred
RESET FLAG BIT OPERATION
RCON: RESET CONTROL REGISTER
Trap Conflict Event
Illegal Opcode or Uninitialized W Register Access
Configuration Mismatch Reset
MCLR Reset
RESET Instruction
WDT Time-out
PWRSAV #SLEEP Instruction
PWRSAV #IDLE Instruction
POR, BOR
POR
PWRSAV #SLEEP instruction with DSCON <DSEN> set
Preliminary
Setting Event
PIC24F04KA201 FAMILY
TABLE 6-2:
Reset Type
(1)
WDTO
MCLR
SWR
POR
BOR
(CONTINUED)
FNOSC Configuration bits
(FNOSC<10:8>)
COSC Control bits
(OSCCON<14:12>)
OSCILLATOR SELECTION vs.
TYPE OF RESET (CLOCK
SWITCHING ENABLED)
Clock Source Determinant
PWRSAV Instruction, POR
Clearing Event
DS39937B-page 53
POR
POR
POR
POR
POR
POR
POR
POR
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