PIC16F1823-I/P Microchip Technology, PIC16F1823-I/P Datasheet - Page 340

• Manufacturer Part Number: PIC16F1823-I/P
• Description: IC MCU 8BIT FLASH 14-DIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F1823-I/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 32MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 KB
• Interface Type: MI2C, SPI, EUSART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC12F/LF1822/PIC16F/LF1823
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Description:
TRIS
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS41413B-page 340
Swap Nibbles in f
[ label ]
0  f  127
d  [0,1]
(f<3:0>)  (destination<7:4>),
(f<7:4>)  (destination<3:0>)
None
The upper and lower nibbles of regis-
ter ‘f’ are exchanged. If ‘d’ is ‘0’, the
result is placed in the W register. If ‘d’
is ‘1’, the result is placed in register ‘f’.
Load TRIS Register with W
[ label ] TRIS f
5  f  7
(W)  TRIS register ‘f’
None
Move data from W register to TRIS
register.
When ‘f’ = 5, TRISA is loaded.
When ‘f’ = 6, TRISB is loaded.
When ‘f’ = 7, TRISC is loaded.
SWAPF f,d
Preliminary
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
Exclusive OR W with f
[ label ]
0  f  127
d  [0,1]
(W) .XOR. (f) destination)
Z
Exclusive OR the contents of the W
register with register ‘f’. If ‘d’ is ‘0’, the
result is stored in the W register. If ‘d’
is ‘1’, the result is stored back in regis-
ter ‘f’.
Exclusive OR literal with W
[ label ]
0 k 255
(W) .XOR. k W)
Z
The contents of the W register are
XOR’ed with the eight-bit
literal ‘k’. The result is placed in the
W register.
 2010 Microchip Technology Inc.
XORWF
XORLW k
f,d