ATTINY88-MUR Atmel, ATTINY88-MUR Datasheet - Page 27
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ATTINY88-MUR
Manufacturer Part Number
ATTINY88-MUR
Description
MCU AVR 8KB FLASH 12MHZ 32QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet
1.ATTINY48-MU.pdf
(302 pages)
Specifications of ATTINY88-MUR
Core Processor
AVR
Core Size
8-Bit
Speed
12MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
64 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY88-MUR
Manufacturer:
AT
Quantity:
20 000
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5.4.4
5.4.5
5.4.6
8008G–AVR–04/11
GPIOR2 – General Purpose I/O Register 2
GPIOR1 – General Purpose I/O Register 1
GPIOR0 – General Purpose I/O Register 0
interrupted EEPROM access to fail. It is recommended to have the Global Interrupt Flag cleared
during all the steps to avoid these problems.
When the write access time has elapsed, the EEPE bit is cleared by hardware. The user soft-
ware can poll this bit and wait for a zero before writing the next byte. When EEPE has been set,
the CPU is halted for two cycles before the next instruction is executed.
• Bit 0 – EERE: EEPROM Read Enable
This is the read strobe of the EEPROM. When the target address has been set up in the EEAR,
the EERE bit must be written to one to trigger the EEPROM read operation.
EEPROM read access takes one instruction, and the requested data is available immediately.
When the EEPROM is read, the CPU is halted for four cycles before the next instruction is
executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in
progress, it not possible to read the EEPROM, or to change the address register (EEAR).
This register may be used freely for storing any kind of data.
This register may be used freely for storing any kind of data.
This register may be used freely for storing any kind of data.
Bit
0x2B (0x4B)
Read/Write
Initial Value
Bit
0x2A (0x4A)
Read/Write
Initial Value
Bit
0x1E (0x3E)
Read/Write
Initial Value
MSB
MSB
MSB
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
ATtiny48/88
LSB
R/W
LSB
R/W
LSB
R/W
0
0
0
0
0
0
GPIOR2
GPIOR1
GPIOR0
27
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