ATTINY461-20SUR Atmel, ATTINY461-20SUR Datasheet - Page 115

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ATTINY461-20SUR

Manufacturer Part Number
ATTINY461-20SUR
Description
MCU AVR 4KB FLASH 20MHZ 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY461-20SUR

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12.12.2
2588E–AVR–08/10
TCCR1B – Timer/Counter1 Control Register B
COM1B1S and COM1B0S in TCCR1C will show here. See
Register C” on page
• Bit 3 – FOC1A: Force Output Compare Match 1A
The FOC1A bit is only active when the PWM1A bit specify a non-PWM mode.
Writing a logical one to this bit forces a change in the Waveform Output (OCW1A) and the Out-
put Compare pin (OC1A) according to the values already set in COM1A1 and COM1A0. If
COM1A1 and COM1A0 written in the same cycle as FOC1A, the new settings will be used. The
Force Output Compare bit can be used to change the output pin value regardless of the timer
value. The automatic action programmed in COM1A1 and COM1A0 takes place as if a compare
match had occurred, but no interrupt is generated.
The FOC1A bit always reads zero.
• Bit 2 – FOC1B: Force Output Compare Match 1B
The FOC1B bit is only active when the PWM1B bit specify a non-PWM mode.
Writing a logical one to this bit forces a change in the Waveform Output (OCW1B) and the Out-
put Compare pin (OC1B) according to the values already set in COM1B1 and COM1B0. If
COM1B1 and COM1B0 written in the same cycle as FOC1B, the new settings will be used. The
Force Output Compare bit can be used to change the output pin value regardless of the timer
value. The automatic action programmed in COM1B1 and COM1B0 takes place as if a compare
match had occurred, but no interrupt is generated.
The FOC1B bit always reads zero.
• Bit 1 – PWM1A: Pulse Width Modulator A Enable
When set (one) this bit enables PWM mode based on comparator OCR1A
• Bit 0 – PWM1B: Pulse Width Modulator B Enable
When set (one) this bit enables PWM mode based on comparator OCR1B.
• Bit 7 – PWM1X : PWM Inversion Mode
When this bit is set (one), the PWM Inversion Mode is selected and the Dead Time Generator
outputs, OC1x and OC1x are inverted.
• Bit 6 – PSR1 : Prescaler Reset Timer/Counter1
When this bit is set (one), the Timer/Counter1 prescaler (TCNT1 is unaffected) will be reset. The
bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have
no effect. This bit will always read as zero.
• Bits 5,4 – DTPS11, DTPS10: Dead Time Prescaler Bits
The Timer/Counter1 Control Register B is a 8-bit read/write register.
Bit
0x2F (0x4F)
Read/Write
Initial value
PWM1X
R/W
7
0
117.
PSR1
R/W
6
0
DTPS11
R/W
5
0
DTPS10
R/W
4
0
CS13
R/W
3
0
“TCCR1C – Timer/Counter1 Control
CS12
R/W
2
0
CS11
R/W
1
0
CS10
R/W
0
0
TCCR1B
115

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