AT89LP828-20AU Atmel, AT89LP828-20AU Datasheet - Page 125

MCU 8051 8K FLASH SPI 32TQFP

AT89LP828-20AU

Manufacturer Part Number
AT89LP828-20AU
Description
MCU 8051 8K FLASH SPI 32TQFP
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP828-20AU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
30
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
2-Wire, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
30
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89ISP
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP828-20AU
Manufacturer:
Atmel
Quantity:
360
Part Number:
AT89LP828-20AU
Manufacturer:
Atmel
Quantity:
10 000
23.9.5
3654A–MICRO–8/09
Serial Peripheral Interface
The Serial Peripheral Interface (SPI) is a byte-oriented full-duplex synchronous serial communi-
cation channel. During In-System Programming, the programmer always acts as the SPI master
and the target device always acts as the SPI slave. The target device receives serial data on
MOSI and outputs serial data on MISO. The Programming Interface implements a standard
SPI Port with a fixed data order. For In-System Programming, bytes are transferred MSB first as
shown in
0) where bits are sampled on the rising edge of SCK and output on the falling edge of SCK. For
more detailed timing information see
Figure 23-9. ISP Byte Sequence
Figure 23-10. Serial Programming Interface Timing
MISO
MOSI
SCK
SS
Figure
MOSI
MISO
SCK
23-9. The SCK phase and polarity follow SPI clock mode 0 (CPOL = 0, CPHA =
t
SSE
t
SOE
7
7
t
SHSL
6
6
t
SCK
Data Sampled
Figure
t
5
5
t
SLSH
SR
23-10.
t
SOV
4
4
t
SOH
3
3
t
AT89LP428/828
SF
2
2
t
SIS
1
1
t
SIH
t
SSD
0
0
t
SOX
125

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