PIC16LF648A-I/P Microchip Technology, PIC16LF648A-I/P Datasheet - Page 94

IC PIC MCU FLASH 4KX14 18DIP

PIC16LF648A-I/P

Manufacturer Part Number
PIC16LF648A-I/P
Description
IC PIC MCU FLASH 4KX14 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16LF648A-I/P

Program Memory Type
FLASH
Program Memory Size
7KB (4K x 14)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SCI/USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
3
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
9Ah
9Bh
9Ch
9Dh
Legend:
Note
PIC16F627A/628A/648A
13.7
The data EEPROM is a high endurance, byte address-
able array that has been optimized for the storage of
frequently
variables or other data that are updated often).
Frequently changing values will typically be updated
more often than specification D124. If this is not the
case, an array refresh must be performed.
EXAMPLE 13-4:
13.8
When the device is code protected, the CPU is able to
read and write data to the Data EEPROM.
TABLE 13-1:
DS40044B-page 92
Address
Loop
#IFDEF __16F648A
#ELSE
#ENDIF
BANKSEL
CLRF
BCF
BSF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BSF
BTFSC
GOTO
INCFSZ
INCF
BTFSS
GOTO
BCF
BSF
1: EECON2 is not a physical register.
Shaded cells are not used by data EEPROM.
Using the Data EEPROM
DATA EEPROM OPERATION
DURING CODE PROTECT
x = unknown, u = unchanged, - = unimplemented read as ‘0’, q = value depends upon condition.
EEDATA
EEADR
EECON1
EECON2
changing
Name
REGISTERS/BITS ASSOCIATED WITH DATA EEPROM
(1)
0X80
EEADR
INTCON, GIE
EECON1, WREN
EECON1, RD
0x55
EECON2
0xAA
EECON2
EECON1, WR
EECON1, WR
$ - 1
EEADR, f
EEADR, f
EEADR, 7
Loop
EECON1, WREN
INTCON, GIE
DATA EEPROM REFRESH ROUTINE
EEPROM data register
EEPROM address register
EEPROM control register 2
information
Bit 7
Bit 6
(e.g.,
Bit 5
program
;select Bank1
;start at address 0
;disable interrupts
;enable EE writes
;retrieve data into EEDATA
;first step of ...
;... required sequence
;second step of ...
;... required sequence
;start write sequence
;wait for write complete
;256 bytes in 16F648A
;test for end of memory
;128 bytes in 16F627A/628A
;next address
;test for end of memory
;end of conditional assembly
;repeat for all locations
;disable EE writes
;enable interrupts (optional)
Bit 4
Preliminary
WRERR
Bit 3
For this reason, variables that change infrequently
(such as constants, IDs, calibration, etc.) should be
stored in Flash program memory.
A simple data EEPROM refresh routine is shown in
Example 13-4.
WREN
Note:
Bit 2
If data EEPROM is only used to store
constants and/or data that changes rarely,
an array refresh is likely not required. See
specification D124.
Bit 1
WR
 2004 Microchip Technology Inc.
Bit 0
RD
Power-on
xxxx xxxx
xxxx xxxx
Value on
---- x000
---- ----
Reset
Value on all
uuuu uuuu
uuuu uuuu
---- q000
Resets
---- ----
other

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