AT90PWM81-16MN Atmel, AT90PWM81-16MN Datasheet - Page 58

• Manufacturer Part Number: AT90PWM81-16MN
• Description: IC MCU AVR 8K FLASH ISP 32QFN
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16MN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 32-MLF®, QFN
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.4.1
58
AT90PWM81
Watchdog Timer Control Register - WDTCSR
Note:
Note: The Watchdog Timer should be reset before any change of the WDP bits, since a change in the
WDP bits can result in a time-out when switching to a shorter time-out period;
• Bit 7 - WDIF: Watchdog Interrupt Flag
This bit is set when a time-out occurs in the Watchdog Timer and the Watchdog Timer is configured for
interrupt. WDIF is cleared by hardware when executing the corresponding interrupt handling vector.
Alternatively, WDIF is cleared by writing a logic one to the flag. When the I-bit in SREG and WDIE are
set, the Watchdog Time-out Interrupt is executed.
Bit
Read/Write
Initial Value
Assembly Code Example
C Code Example
WDT_Prescaler_Change:
void WDT_Prescaler_Change(void)
{
}
; Turn off global interrupt
cli
; Reset Watchdog Timer
wdr
; Start timed sequence
lds r16, WDTCSR
ori
sts WDTCSR, r16
; --
; Set new prescaler(time-out) value = 64K cycles (~0.5 s)
ldi
sts WDTCSR, r16
; --
; Turn on global interrupt
sei
ret
__disable_interrupt();
__watchdog_reset();
/* Start timed
WDTCSR |= (1<<WDCE) | (1<<WDE);
/* Set new prescaler(time-out) value = 64K cycles (~0.5 s) */
WDTCSR
__enable_interrupt();
1. The example code assumes that the part specific header file is included.
r16, (1<<WDCE) | (1<<WDE)
Got four cycles to set the new values from here -
r16, (1<<WDE) | (1<<WDP2) | (1<<WDP0)
Finished setting new values, used 2 cycles -
7
WDIF
R/W
0
(1)
= (1<<WDE) | (1<<WDP2) | (1<<WDP0);
6
WDIE
R/W
0
(1)
equence */
5
R/W
0
WDP3
4
WDCE
R/W
0
3
WDE
R/W
X
2
WDP2
R/W
0
1
WDP1
R/W
0
0
WDP0
R/W
0
7734P–AVR–08/10
WDTCSR