ATMEGA8L-8AUR Atmel, ATMEGA8L-8AUR Datasheet - Page 77
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ATMEGA8L-8AUR
Manufacturer Part Number
ATMEGA8L-8AUR
Description
MCU AVR 8KB FLASH 8MHZ 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA8L-8MU.pdf
(302 pages)
Specifications of ATMEGA8L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Package
32TQFP
Device Core
AVR
Family Name
ATmega
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Definitions
Compatibility
Accessing 16-bit
Registers
2486Z–AVR–02/11
The Input Capture Register can capture the Timer/Counter value at a given external (edge trig-
gered) event on either the Input Capture Pin (ICP1) or on the Analog Comparator pins (see
“Analog Comparator” on page
Canceler) for reducing the chance of capturing noise spikes.
The TOP value, or maximum Timer/Counter value, can in some modes of operation be defined
by either the OCR1A Register, the ICR1 Register, or by a set of fixed values. When using
OCR1A as TOP value in a PWM mode, the OCR1A Register can not be used for generating a
PWM output. However, the TOP value will in this case be double buffered allowing the TOP
value to be changed in run time. If a fixed TOP value is required, the ICR1 Register can be used
as an alternative, freeing the OCR1A to be used as PWM output.
The following definitions are used extensively throughout the document:
Table 35. Definitions
The 16-bit Timer/Counter has been updated and improved from previous versions of the 16-bit
AVR Timer/Counter. This 16-bit Timer/Counter is fully compatible with the earlier version
regarding:
•
•
•
The following control bits have changed name, but have same functionality and register location:
•
•
•
The following bits are added to the 16-bit Timer/Counter Control Registers:
•
•
The 16-bit Timer/Counter has improvements that will affect the compatibility in some special
cases.
The TCNT1, OCR1A/B, and ICR1 are 16-bit registers that can be accessed by the AVR CPU via
the 8-bit data bus. The 16-bit register must be byte accessed using two read or write operations.
The 16-bit timer has a single 8-bit register for temporary storing of the High byte of the 16-bit
access. The same temporary register is shared between all 16-bit registers within the 16-bit
timer. Accessing the Low byte triggers the 16-bit read or write operation. When the Low byte of a
16-bit register is written by the CPU, the High byte stored in the temporary register, and the Low
byte written are both copied into the 16-bit register in the same clock cycle. When the Low byte
BOTTOM
MAX
TOP
All 16-bit Timer/Counter related I/O Register address locations, including Timer Interrupt
Registers
Bit locations inside all 16-bit Timer/Counter Registers, including Timer Interrupt Registers
Interrupt Vectors
PWM10 is changed to WGM10
PWM11 is changed to WGM11
CTC1 is changed to WGM12
FOC1A and FOC1B are added to TCCR1A
WGM13 is added to TCCR1B
The counter reaches the BOTTOM when it becomes 0x0000.
The counter reaches its MAXimum when it becomes 0xFFFF (decimal
65535).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be one
of the fixed values: 0x00FF, 0x01FF, or 0x03FF, or to the value stored in
the OCR1A or ICR1 Register. The assignment is dependent of the mode
of operation.
186). The Input Capture unit includes a digital filtering unit (Noise
ATmega8(L)
77
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