PIC12LC671-04I/P Microchip Technology, PIC12LC671-04I/P Datasheet - Page 81
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PIC12LC671-04I/P
Manufacturer Part Number
PIC12LC671-04I/P
Description
IC MCU OTP 1KX14 LV A/D 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr
Specifications of PIC12LC671-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Size
1.75KB (1K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Processor Series
PIC12LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
8
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
8
For Use With
309-1051 - ADAPTER 8-DIP BD W/2 SO PLUGS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
SWAPF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
TRIS
1999 Microchip Technology Inc.
Swap Nibbles in f
[ label ] SWAPF f,d
0
d
(f<3:0>)
(f<7:4>)
None
The upper and lower nibbles of
register ’f’ are exchanged. If ’d’ is
0, the result is placed in W regis-
ter. If ’d’ is 1, the result is placed in
register ’f’.
1
1
Before Instruction
After Instruction
Load TRIS Register
[ label ] TRIS
5
(W)
None
The instruction is supported for
code compatibility with the
PIC16C5X products. Since TRIS
registers are readable and writ-
able, the user can directly address
them.
1
1
To maintain upward compatibility
with future PIC12C67X products,
do not use this instruction.
SWAPF
00
00
f
f
[0,1]
127
7
TRIS register f;
REG,
0000
REG1
REG1
W
1110
(dest<7:4>),
(dest<3:0>)
f
0
0110
dfff
=
=
=
0xA5
0xA5
0x5A
0fff
ffff
XORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
XORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example
Exclusive OR W with f
[ label ] XORWF
0
d
(W) .XOR. (f)
Z
Exclusive OR the contents of the
W register with register 'f'. If 'd' is
0, the result is stored in the W
register. If 'd' is 1, the result is
stored back in register 'f'.
1
1
XORWF
Before Instruction
After Instruction
Exclusive OR Literal with W
[ label ]
0
(W) .XOR. k
Z
The contents of the W register
are XOR’ed with the eight bit lit-
eral 'k'. The result is placed in the
W register.
1
1
XORLW
Before Instruction
After Instruction
00
f
11
[0,1]
k
PIC12C67X
127
255
REG
W
REG
W
0110
XORLW k
1010
0xAF
W
W
REG
=
=
DS30561B-page 81
W)
dest)
1
dfff
=
=
=
=
kkkk
f,d
0xB5
0x1A
0xAF
0xB5
0x1A
0xB5
ffff
kkkk