PIC12LC671-04I/SM Microchip Technology, PIC12LC671-04I/SM Datasheet - Page 42

• Manufacturer Part Number: PIC12LC671-04I/SM
• Description: IC MCU OTP 1KX14 LV A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12LC671-04I/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Processor Series: PIC12LC
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 8
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: ICE2000
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIC12C67X
7.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer, respectively (Figure 7-6). For simplicity, this
counter is being referred to as “prescaler” throughout
this data sheet. Note that there is only one prescaler
available which is mutually exclusively shared between
the Timer0 module and the Watchdog Timer. Thus, a
prescaler assignment for the Timer0 module means
that there is no prescaler for the Watchdog Timer, and
vice-versa.
FIGURE 7-6:
DS30561B-page 42
GP2/T0CKI/
AN2/INT
CLKOUT (= F
WDT Enable bit
Watchdog
Timer
Prescaler
Note: T0CS, T0SE, PSA, PS<2:0> are (OPTION<5:0>).
OSC
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
/4)
T0SE
0
1
PSA
M
U
X
0
1
T0CS
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
The PSA and PS<2:0> bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (i.e., CLRF 1, MOVWF 1,
BSF
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer. The pres-
caler is not readable or writable.
PSA
1,x...., etc.) will clear the prescaler. When
PS<2:0>
Cycles
SYNC
2
1999 Microchip Technology Inc.
TMR0 reg
Data Bus
8
Set flag bit T0IF
on Overflow