PIC16F723-I/ML Microchip Technology, PIC16F723-I/ML Datasheet - Page 103

• Manufacturer Part Number: PIC16F723-I/ML
• Description: IC PIC MCU FLASH 4KX14 28-QFN
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16F723-I/ML

• Core Size: 8-Bit
• Program Memory Size: 7KB (4K x 14)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Type: FLASH
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 11x8b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Controller Family/series: PIC16F
• No. Of I/o's: 25
• Ram Memory Size: 192Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• No. Of Pwm: RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPAC164322 - MODULE SOCKET MPLAB PM3 28/44QFN
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TABLE 9-1:
FIGURE 9-2:
© 2007 Microchip Technology Inc.
Legend: Shaded cells are outside of recommended range.
Note 1:
Clock Source
Fosc/16
Fosc/32
Fosc/64
ADC Clock Period (T
Fosc/2
Fosc/4
Fosc/8
ADC
F
2:
3:
4:
RC
Tcy to T
The F
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
When the device frequency is greater than 1 MHz, the F
conversion will be performed during Sleep.
Set GO/DONE bit
Holding Capacitor is Disconnected from Analog Input (typically 100 ns)
AD
RC
Tad0
ADC CLOCK PERIOD (T
source has a typical T
ADCS<2:0>
ANALOG-TO-DIGITAL CONVERSION T
Conversion Starts
000
100
001
101
010
110
x11
Tad1
AD
)
Tad2
b7
0.8-4.0 μs
100 ns
200 ns
400 ns
20 MHz
800 ns
1.6 μs
3.2 μs
AD
Tad3
time of 1.6 μs for V
b6
AD
(2)
(2)
(2)
(1,4)
) V
Preliminary
S
T
0.8-4.0 μs
. DEVICE OPERATING FREQUENCIES
AD
b5
PIC16F72X/PIC16LF72X
125 ns
250 ns
0.5 μs
AD
16 MHz
4
1.0 μs
2.0 μs
4.0 μs
time.
Tad5
(2)
(2)
(2)
Device Frequency (F
ADRES register is loaded,
GO/DONE bit is cleared,
ADIF bit is set,
Holding capacitor is connected to analog input
b4
(1,4)
DD
.
RC
AD
0.8-4.0 μs
clock source is only recommended if the
Tad6
CYCLES
250 ns
500 ns
b3
8.0 μs
8 MHz
1.0 μs
2.0 μs
4.0 μs
(3)
(2)
(2)
(1,4)
T
AD
b2
7
OSC
0.8-4.0 μs
16.0 μs
500 ns
T
8.0 μs
)
4 MHz
AD
1.0 μs
2.0 μs
4.0 μs
b1
8
(3)
(2)
(3)
(1,4)
T
AD
DS41341A-page 101
b0
9
0.8-4.0 μs
16.0 μs
32.0 μs
64.0 μs
8.0 μs
1 MHz
2.0 μs
4.0 μs
(3)
(3)
(3)
(3)
(1,4)