PIC16LC716-04I/P Microchip Technology, PIC16LC716-04I/P Datasheet - Page 39
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PIC16LC716-04I/P
Manufacturer Part Number
PIC16LC716-04I/P
Description
IC MCU OTP 2KX14 A/D PWM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C716-04P.pdf
(106 pages)
Specifications of PIC16LC716-04I/P
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
13
Number Of Timers
3 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
4 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
6.1
Timer2 can be used as the PWM time base for PWM
mode of the CCP module.
The TMR2 register is readable and writable, and is
cleared on any device Reset.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR2 register
• a write to the T2CON register
• any device Reset (Power-on Reset, MCLR Reset,
TMR2 is not cleared when T2CON is written.
TABLE 6-1:
© 2005 Microchip Technology Inc.
Address
0Bh,8Bh
0Ch
8Ch
11h
12h
92h
Legend:
Watchdog Timer Reset, or Brown-out Reset)
or
Timer2 Operation
x = unknown, u = unchanged, — = unimplemented read as ‘0’. Shaded cells are not used by the Timer2 module.
Name
INTCON
PIR1
PIE1
TMR2
T2CON
PR2
1:16,
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
OSC
Timer2 Module’s Register
Timer2 Period Register
selected
/4) has a prescale option of 1:1,
Bit 7
GIE
—
—
—
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
PEIE
ADIF
ADIE
Bit 6
by
control
Bit 5
T0IE
—
—
Bit 4
INTE
bits
—
—
RBIE
Bit 3
—
—
6.2
The Timer2 module has an 8-bit period register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
CCP1IF
CCP1IE
Bit 2
T0IF
Timer2 Interrupt
TMR2IF
TMR2IE
PIC16C712/716
INTF
Bit 1
TMR1IF
TMR1IE
RBIF
Bit 0
0000 000x 0000 000u
-00- -000 0000 -000
-0-- -000 0000 -000
0000 0000 0000 0000
1111 1111 1111 1111
Value on
POR,
BOR
DS41106B-page 37
Value on
all other
Resets