PIC16F887-E/P Microchip Technology, PIC16F887-E/P Datasheet - Page 208

• Manufacturer Part Number: PIC16F887-E/P
• Description: IC PIC MCU FLASH 8KX14 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F887-E/P

• Core Size: 8-Bit
• Program Memory Size: 14KB (8K x 14)
• Mfg Application Notes: Intro to Capacitive Sensing Appl Notes Layout and Physical Design Appl Note
• Core Processor: PIC
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 368 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 14x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Controller Family/series: PIC16F
• No. Of I/o's: 35
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 368Byte
• Cpu Speed: 20MHz
• No. Of Timers: 3
• Package: 40PDIP
• Device Core: PIC
• Family Name: PIC16
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 35
• Interface Type: I2C/SPI/USART
• On-chip Adc: 14-chx10-bit
• Number Of Timers: 3
• Processor Series: PIC16F
• Core: PIC
• Data Ram Size: 368 B
• Maximum Clock Frequency: 20 MHz
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 53273-916
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM164123, DM164120-3, DV164122
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DVA18XP400 - DEVICE ADAPTER 18F4220 PDIP 40LD
• Lead Free Status / Rohs Status: Details

PIC16F882/883/884/886/887
13.4.16.2
During a Repeated Start condition, a bus collision
occurs if:
a)
b)
When the user de-asserts SDA and the pin is allowed
to float high, the BRG is loaded with SSPADD<6:0>
and counts down to 0. The SCL pin is then de-asserted,
and when sampled high, the SDA pin is sampled.
FIGURE 13-24:
FIGURE 13-25:
DS41291F-page 206
A low level is sampled on SDA when SCL goes
from low level to high level.
SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to trans-
mit a data ’1’.
SDA
SCL
BCLIF
RSEN
S
SSPIF
SDA
SCL
RSEN
BCLIF
S
SSPIF
Bus Collision During a Repeated
Start Condition
BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
SCL goes low before SDA,
Set BCLIF, release SDA and SCL
T
BRG
Sample SDA when SCL goes high,
If SDA = 0, set BCLIF and release SDA and SCL
If SDA is low, a bus collision has occurred (i.e, another
master is attempting to transmit a data ‘0’, see
Figure 13-24). If SDA is sampled high, the BRG is
reloaded and begins counting. If SDA goes from high-
to-low before the BRG times out, no bus collision
occurs because no two masters can assert SDA at
exactly the same time.
If SCL goes from high-to-low before the BRG times out
and SDA has not already been asserted, a bus collision
occurs. In this case, another master is attempting to
transmit a data ‘1’ during the Repeated Start condition
(Figure 13-25).
If at the end of the BRG time-out, both SCL and SDA are
still high, the SDA pin is driven low and the BRG is
reloaded and begins counting. At the end of the count,
regardless of the status of the SCL pin, the SCL pin is
driven low and the Repeated Start condition is complete.
T
Cleared in software
© 2009 Microchip Technology Inc.
BRG
Interrupt cleared
in software
‘0’
‘0’
‘
0
’