ATMEGA168V-10AU SL383 Atmel, ATMEGA168V-10AU SL383 Datasheet - Page 42

• Manufacturer Part Number: ATMEGA168V-10AU SL383
• Description: MCU AVR 16KB FLASH 10MHZ 32TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA168V-10AU SL383

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 10MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-TQFP, 32-VQFP
• For Use With: ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATMEGA168V-10AUR; ATMEGA168V-10AUR SL383; ATMEGA168V-10AUR SL383; ATMEGA168V-10AUR

9.9
9.9.1
42
Register Description
ATmega48/88/168
SMCR – Sleep Mode Control Register
The Sleep Mode Control Register contains control bits for power management.
• Bits 7..4 Res: Reserved Bits
These bits are unused bits in the ATmega48/88/168, and will always read as zero.
• Bits 3..1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the five available sleep modes as shown in
Table 9-2.
Note:
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bit
0x33 (0x53)
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby mode is only recommended for use with external crystals or resonators.
Sleep Mode Select
R
7
–
0
SM1
0
0
1
1
0
0
1
1
R
6
–
0
R
5
–
0
SM0
0
1
0
1
0
1
0
1
R
4
–
0
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Reserved
SM2
R/W
3
0
(1)
SM1
R/W
2
0
SM0
R/W
Table
1
0
9-2.
R/W
SE
0
0
2545S–AVR–07/10
SMCR