atmega168v ATMEL Corporation, atmega168v Datasheet

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Features • High Performance, Low Power AVR • Advanced RISC Architecture – 131 Powerful Instructions – Most Single Clock Cycle Execution – General Purpose Working Registers – Fully Static Operation – MIPS Throughput at ...

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Pin Configurations Figure 1-1. Pinout ATmega48/88/1682545LS TQFP Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 GND 3 VCC 4 GND 5 VCC 6 (PCINT6/XTAL1/TOSC1) PB6 7 (PCINT7/XTAL2/TOSC2) PB7 8 28 MLF Top View (PCINT19/OC2B/INT1) PD3 1 (PCINT20/XCK/T0) PD4 2 ...

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Pin Descriptions 1.1.1 VCC Digital supply voltage. 1.1.2 GND Ground. 1.1.3 Port B (PB7:0) XTAL1/XTAL2/TOSC1/TOSC2 Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive ...

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The Port D pins are tri-stated when a reset condition becomes active, even if the clock is not running. The various special features of Port D are elaborated in 84. 1.1 the supply ...

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Overview The ATmega48/88/168 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega48/88/168 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...

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CISC microcontrollers. The ATmega48/88/168 provides the following features: 4K/8K/16K bytes of In-System Program- mable Flash with Read-While-Write capabilities, 256/512/512 bytes EEPROM, 512/1K/1K bytes SRAM, ...

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... Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 2545LS–AVR–08/07 ATmega48/88/168 7 ...

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Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

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Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...

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Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...

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Address Name Bit 7 0x1B (0x3B) PCIFR – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) Reserved – 0x13 (0x33) Reserved – ...

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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

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Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...

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Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break Note: 1. These instructions are only available in ATmega168. ATmega48/88/168 14 Description Rd ← STACK (see specific descr. for ...

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Ordering Information 6.1 ATmega48 Speed (MHz) Power Supply (3) 10 1.8 - 5.5 (3) 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering ...

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ATmega88 Speed (MHz) Power Supply (3) 10 1.8 - 5.5 (3) 20 2.7 - 5.5 Note: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum ...

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... Lead Pitch 0.50 mm Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 28P3 28-lead, 0.300” Wide, Plastic Dual Inline Package (PDIP) 2545LS–AVR–08/07 Ordering Code ATmega168V-10AI ATmega168V-10MI ATmega168V-10PI (2) ATmega168V-10AU (2) ATmega168V-10MU (2) ATmega168V-10PU ATmega168-20AI ATmega168-20MI ATmega168-20PI (2) ATmega168-20AU (2) ATmega168-20MU (2) ATmega168-20PU ...

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Packaging Information 7.1 32A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation ABA. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions ...

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Pin TOP VIEW 0.20 b BOTTOM VIEW The terminal # Laser-marked Feature. Note: 2325 Orchard Parkway San Jose, CA 95131 R 2545LS–AVR–08/ ...

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Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San Jose, CA 95131 ...

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A SEATING PLANE Note: 1. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). 2325 Orchard Parkway San Jose, CA 95131 R 2545LS–AVR–08/07 ...

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Errata 8.1 Errata ATmega48 The revision letter in this section refers to the revision of the ATmega48 device. 8.1.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be ...

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Problem Fix/Workaround Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2. The only safe time to write to any of the Timer2 registers ...

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necessary to read an EEPROM location after Erase Only, use an Atomic Write opera- tion with 0xFF as data in order to erase a location. In any case, the Write Only operation can be used as intended. ...

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Errata ATmega88 The revision letter in this section refers to the revision of the ATmega88 device. 8.2.1 Rev. D • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when ...

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Problem Fix/Workaround The first case can be avoided during run-mode by ensuring that only one reset source is active external reset push button is used, the reset start-up time should be selected such that the reset line is ...

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System Programming of the device. There are theoretical possibilities of this happening also in run-mode. The following three cases can trigger the device to get stuck in a reset-state: - Two succeeding resets are applied where the second reset occurs ...

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Some parts may get stuck in a reset state when a reset signal is applied when the internal reset state-machine specific state. The internal reset state-machine is in this state for approximately 10 ns immediately before the ...

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Datasheet Revision History Please note that the referring page numbers in this section are referred to this document. The referring revision in this section are referring to the document revision. 9.1 Rev. 2545L-08/ 9.2 Rev. ...

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Rev. 2545G-06/ 10. 11. 12. 13. 14. 15. 16. 17 18. 19. 20. 9.7 Rev. 2545F-05/ ATmega48/88/168 30 Updated ...

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Rev. 2545E-02/ 10. 11. 12. 9.9 Rev. 2545D-07/ 10. 11. 9.10 Rev. 2545C-04/ 2545LS–AVR–08/07 MLF-package alternative changed ...

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Rev. 2545B-01/ 10. 11. 12. ATmega48/88/168 32 Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption Estimates in 34.“Features” on page Updated “Stack Pointer” on page 13 ...

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