PIC16C710-20I/P Microchip Technology, PIC16C710-20I/P Datasheet - Page 34
![IC MCU OTP 512X14 A/D 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC16C710-20I/P
Manufacturer Part Number
PIC16C710-20I/P
Description
IC MCU OTP 512X14 A/D 18DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16C710-20I/P
Core Size
8-Bit
Program Memory Size
896B (512 x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
13
Program Memory Type
OTP
Ram Size
36 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 4x8b
Operating Temperature
-40°C ~ 85°C
Package / Case
18-DIP (0.300", 7.62mm)
Controller Family/series
PIC16C
No. Of I/o's
13
Ram Memory Size
36Byte
Cpu Speed
20MHz
No. Of Timers
2
Digital Ic
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC16C71X
6.3
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer, respectively (Figure 6-6). For simplicity, this
counter is being referred to as “prescaler” throughout
this data sheet. Note that there is only one prescaler
available which is mutually exclusively shared between
the Timer0 module and the Watchdog Timer. Thus, a
prescaler assignment for the Timer0 module means
that there is no prescaler for the Watchdog Timer, and
vice-versa.
The PSA and PS2:PS0 bits (OPTION<3:0>) determine
the prescaler assignment and prescale ratio.
FIGURE 6-6:
DS30272A-page 34
RA4/T0CKI
CLKOUT (=Fosc/4)
WDT Enable bit
pin
Watchdog
Timer
Prescaler
Note: T0CS, T0SE, PSA, PS2:PS0 are (OPTION<5:0>).
BLOCK DIAGRAM OF THE TIMER0/WDT PRESCALER
T0SE
0
1
PSA
M
U
X
0
1
T0CS
M
U
X
0
8-bit Prescaler
8 - to - 1MUX
Time-out
8
M U X
WDT
1
0
1
PSA
M
U
X
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g. CLRF 1, MOVWF 1,
BSF
assigned to WDT, a CLRWDT instruction will clear the
prescaler along with the Watchdog Timer. The pres-
caler is not readable or writable.
Note:
PSA
PS2:PS0
1,x....etc.) will clear the prescaler. When
Cycles
SYNC
Writing to TMR0 when the prescaler is
assigned to Timer0 will clear the prescaler
count, but will not change the prescaler
assignment.
2
1997 Microchip Technology Inc.
TMR0 reg
Data Bus
8
Set flag bit T0IF
on Overflow
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