ATTINY24V-10SSU Atmel, ATTINY24V-10SSU Datasheet - Page 15

IC MCU AVR 2K FLASH 10MHZ 14SOIC

ATTINY24V-10SSU

Manufacturer Part Number
ATTINY24V-10SSU
Description
IC MCU AVR 2K FLASH 10MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24V-10SSU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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5. Memories
5.1
5.2
8006K–AVR–10/10
In-System Re-programmable Flash Program Memory
SRAM Data Memory
This section describes the different memories in the ATtiny24/44/84. The AVR architecture has
two main memory spaces, the Data memory and the Program memory space. In addition, the
ATtiny24/44/84 features an EEPROM Memory for data storage. All three memory spaces are lin-
ear and regular.
The ATtiny24/44/84 contains 2/4/8K byte On-chip In-System Reprogrammable Flash memory
for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash is organized as
1024/2048/4096 x 16.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATtiny24/44/84
Program Counter (PC) is 10/11/12 bits wide, thus addressing the 1024/2048/4096 Program
memory locations.
data serial downloading using the SPI pins.
Constant tables can be allocated within the entire Program memory address space (see instruc-
tions LPM – Load Program Memory and SPM – Store Program Memory).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
Figure 5-1.
Figure 5-2 on page 16
The lower data memory locations address both the Register File, the I/O memory and the inter-
nal data SRAM. The first 32 locations address the Register File, the next 64 locations the
standard I/O memory, and the last 128/256/512 locations address the internal data SRAM.
The five different addressing modes for the Data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
12.
Program Memory Map
“Memory Programming” on page 159
shows how the ATtiny24/44/84 SRAM Memory is organized.
Program Memory
0x03FF/0x07FF/0xFFF
0x0000
contains a detailed description on Flash
ATtiny24/44/84
“Instruction Execution Tim-
15

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