ATTINY24V-10SSU Atmel, ATTINY24V-10SSU Datasheet - Page 82

IC MCU AVR 2K FLASH 10MHZ 14SOIC

ATTINY24V-10SSU

Manufacturer Part Number
ATTINY24V-10SSU
Description
IC MCU AVR 2K FLASH 10MHZ 14SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY24V-10SSU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
12
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
For Use With
ATSTK600-DIP40 - STK600 SOCKET/ADAPTER 40-PDIP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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82
ATtiny24/44/84
Table 11-6
Table 11-6.
Note:
Table 11-7
rect PWM mode.
Table 11-7.
Note:
• Bits 3:2 – Res: Reserved Bits
These bits are reserved in the ATtiny24/44/84 and will always read as zero.
• Bits 1:0 – WGM01, WGM00: Waveform Generation Mode
Combined with the WGM02 bit found in the TCCR0B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare Match (CTC) mode, and two types of
Pulse Width Modulation (PWM) modes (see
COM0B1
COM0B1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
1. A special case occurs when OCR0B equals TOP and COM0B1 is set. In this case, the Com-
pare Match is ignored, but the set or clear is done at BOTTOM. See
page 75
pare Match is ignored, but the set or clear is done at TOP. See
page 77
shows COM0B1:0 bit functionality when WGM02:0 bits are set to fast PWM mode.
shows the COM0B1:0 bit functionality when the WGM02:0 bits are set to phase cor-
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM0B0
COM0B0
for more details.
for more details.
0
1
0
1
0
1
0
1
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match, set OC0B at BOTTOM
(non-inverting mode)
Set OC0B on Compare Match, clear OC0B at BOTTOM
(inverting mode)
Description
Normal port operation, OC0B disconnected.
Reserved
Clear OC0B on Compare Match when up-counting. Set OC0B on
Compare Match when down-counting.
Set OC0B on Compare Match when up-counting. Clear OC0B on
Compare Match when down-counting.
Table
11-8. Modes of operation supported by the Timer/Counter
“Modes of Operation” on page
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
74).
8006K–AVR–10/10

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