ATTINY25-15MZ Atmel, ATTINY25-15MZ Datasheet - Page 27

MCU AVR 2K FLASH 15MHZ 20-QFN

ATTINY25-15MZ

Manufacturer Part Number
ATTINY25-15MZ
Description
MCU AVR 2K FLASH 15MHZ 20-QFN
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheet

Specifications of ATTINY25-15MZ

Package / Case
20-QFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
6
Eeprom Size
128 x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128 x 8
Program Memory Size
2KB (2K x 8)
Data Converters
A/D 4x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
USI
Core Size
8-Bit
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
UART, SPI, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 4 Channel
Data Rom Size
128 B
A/d Bit Size
10 bit
A/d Channels Available
4
Height
0.75 mm
Length
4 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
4 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.7
7598H–AVR–07/09
External Clock
The CAL7 bit determines the range of operation for the oscillator. Setting this bit to 0 gives the
lowest frequency range, setting this bit to 1 gives the highest frequency range. The two fre-
quency ranges are overlapping, in other words a setting of OSCCAL = 0x7F gives a higher
frequency than OSCCAL = 0x80.
The CAL6..0 bits are used to tune the frequency within the selected range. A setting of 0x00
gives the lowest frequency in that range, and a setting of 0x7F gives the highest frequency in the
range. Incrementing CAL6..0 by 1 will give a frequency increment of less than 2% in the fre-
quency range 7.3 - 8.1 MHz.
Avoid changing the calibration value in large steps when calibrating the calibrated internal RC
Oscillator to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one cycle to the next can lead to unpredicatble behavior. Changes in OSCCAL should not
exceed 0x20 for each calibration. It is required to ensure that the MCU is kept in Reset during
such changes in the clock frequency
Table 6-8.
To drive the device from an external clock source, CLKI should be driven as shown in
6-4. To run the device on an external clock, the CKSEL Fuses must be programmed to “00”.
Figure 6-4.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 6-9.
SUT1..0
OSCCAL Value
00
01
10
11
6-9.
0x00
0x3F
0x7F
Power-down and Power-save
Internal RC Oscillator Frequency Range
External Clock Drive Configuration
Start-up Times for the External Clock Selection
Start-up Time from
Min Frequency in Percentage of
6 CK
6 CK
6 CK
Nominal Frequency
EXTERNAL
SIGNAL
CLOCK
100%
50%
75%
Additional Delay from
Reserved
14CK + 64 ms
14CK + 4 ms
CLKI
GND
Reset
14CK
Max Frequency in Percentage of
Nominal Frequency
ATtiny25/45/85
BOD enabled
Fast rising power
Slowly rising power
Recommended Usage
100%
150%
200%
Figure
27

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