PIC16F819-I/SSTSL Microchip Technology, PIC16F819-I/SSTSL Datasheet - Page 38
PIC16F819-I/SSTSL
Manufacturer Part Number
PIC16F819-I/SSTSL
Description
IC PIC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SSTSL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- PIC16F818-ISO PDF datasheet #6
- Current page: 38 of 176
- Download datasheet (4Mb)
PIC16F818/819
4.5.2
The internal oscillator’s output has been calibrated at the
factory but can be adjusted in the application. This is
done by writing to the OSCTUNE register (Register 4-1).
The tuning sensitivity is constant throughout the tuning
range. The OSCTUNE register has a tuning range of
±12.5%.
REGISTER 4-1:
DS39598E-page 36
bit 7-6
bit 5-0
OSCTUNE REGISTER
OSCTUNE: OSCILLATOR TUNING REGISTER (ADDRESS 90h)
Unimplemented: Read as ‘0’
TUN<5:0>: Frequency Tuning bits
011111 = Maximum frequency
011110 =
•
•
•
000001 =
000000 = Center frequency. Oscillator module is running at the calibrated frequency.
111111 =
•
•
•
100000 = Minimum frequency
bit 7
Legend:
R = Readable bit
-n = Value at POR
U-0
—
U-0
—
R/W-0
TUN5
W = Writable bit
‘1’ = Bit is set
R/W-0
TUN4
When the OSCTUNE register is modified, the INTOSC
and INTRC frequencies will begin shifting to the new fre-
quency. The INTRC clock will reach the new frequency
within 8 clock cycles (approximately 8 * 32 s = 256 s);
the INTOSC clock will stabilize within 1 ms. Code execu-
tion continues during this shift. There is no indication that
the shift has occurred. Operation of features that depend
on the 31.25 kHz INTRC clock source frequency, such
as the WDT, Fail-Safe Clock Monitor and peripherals,
will also be affected by the change in frequency.
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TUN3
R/W-0
TUN2
2004 Microchip Technology Inc.
x = Bit is unknown
R/W-0
TUN1
R/W-0
TUN0
bit 0
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