PIC16F819-I/SSTSL Microchip Technology, PIC16F819-I/SSTSL Datasheet - Page 67
![IC PIC MCU FLASH 2KX14 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16F819-I/SSTSL
Manufacturer Part Number
PIC16F819-I/SSTSL
Description
IC PIC MCU FLASH 2KX14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(176 pages)
4.PIC16F818-ISO.pdf
(6 pages)
5.PIC16F818-ISO.pdf
(8 pages)
6.PIC16F818-ISO.pdf
(8 pages)
Specifications of PIC16F819-I/SSTSL
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F818-ISO PDF datasheet #4
- PIC16F818-ISO PDF datasheet #5
- PIC16F818-ISO PDF datasheet #6
- Current page: 67 of 176
- Download datasheet (4Mb)
9.0
The Capture/Compare/PWM (CCP) module contains a
16-bit register that can operate as a:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Table 9-1 shows the timer resources of the CCP
module modes.
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. The special event trigger is
generated by a compare match which will reset Timer1
and start an A/D conversion (if the A/D module is
enabled).
REGISTER 9-1:
2004 Microchip Technology Inc.
CAPTURE/COMPARE/PWM
(CCP) MODULE
bit 7-6
bit 5-4
bit 3-0
CCP1CON: CAPTURE/COMPARE/PWM CONTROL REGISTER 1 (ADDRESS 17h)
Unimplemented: Read as ‘0’
CCP1X:CCP1Y: PWM Least Significant bits
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCP1M3:CCP1M0: CCP1 Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCP1 module)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCP1IF bit is set)
1001 = Compare mode, clear output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is
1011 = Compare mode, trigger special event (CCP1IF bit is set, CCP1 pin is unaffected);
11xx = PWM mode
bit 7
Legend:
R = Readable bit
-n = Value at POR
U-0
—
unaffected)
CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)
U-0
—
CCP1X
R/W-0
W = Writable bit
‘1’ = Bit is set
CCP1Y
R/W-0
The CCP module’s input/output pin (CCP1) can be
configured as RB2 or RB3. This selection is set in bit 12
(CCPMX) of the Configuration Word register.
Additional information on the CCP module is available
in the “PICmicro
Manual” (DS33023) and in Application Note AN594,
“Using the CCP Module(s)” (DS00594).
TABLE 9-1:
CCP1M3
CCP Mode
R/W-0
Compare
Capture
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PWM
PIC16F818/819
®
CCP MODE – TIMER
RESOURCE
Mid-Range MCU Family Reference
CCP1M2
R/W-0
CCP1M1
Timer Resource
x = Bit is unknown
R/W-0
DS39598E-page 65
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0
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