PIC18LF25K22-I/SS Microchip Technology, PIC18LF25K22-I/SS Datasheet - Page 354
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PIC18LF25K22-I/SS
Manufacturer Part Number
PIC18LF25K22-I/SS
Description
MCU 8BIT 32KB FLASH 3.6V 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18LF25K22-I/SS
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
24
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 19x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SSOP
Controller Family/series
PIC18
No. Of I/o's
25
Eeprom Memory Size
256Byte
Ram Memory Size
1536Byte
Cpu Speed
64MHz
No. Of Timers
7
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
25
Number Of Timers
7
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 17 Channel
On-chip Dac
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF25K22-I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- Current page: 354 of 496
- Download datasheet (5Mb)
PIC18(L)F2X/4XK22
REGISTER 24-4:
DS41412D-page 354
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
MCLRE
R/P-1
2:
PIC18(L)F2XK22 devices only.
PIC18(L)F4XK22 devices only.
MCLRE: MCLR Pin Enable bit
1 = MCLR pin enabled; RE3 input pin disabled
0 = RE3 input pin enabled; MCLR disabled
Unimplemented: Read as ‘0’
P2BMX: P2B Input MUX bit
1 = P2B is on RB5
0 = P2B is on RC0
T3CMX: Timer3 Clock Input MUX bit
1 = T3CKI is on RC0
0 = T3CKI is on RB5
HFOFST: HFINTOSC Fast Start-up bit
1 = HFINTOSC starts clocking the CPU without waiting for the oscillator to stabilize
0 = The system clock is held off until the HFINTOSC is stable
CCP3MX: CCP3 MUX bit
1 = CCP3 input/output is multiplexed with RB5
0 = CCP3 input/output is multiplexed with RC6
PBADEN: PORTB A/D Enable bit
1 = ANSELB<5:0> resets to 1, PORTB<5:0> pins are configured as analog inputs on Reset
0 = ANSELB<5:0> resets to 0, PORTB<4:0> pins are configured as digital I/O on Reset
CCP2MX: CCP2 MUX bit
1 = CCP2 input/output is multiplexed with RC1
0 = CCP2 input/output is multiplexed with RB3
CCP3 input/output is multiplexed with RE0
P2B is on RD2
U-0
—
CONFIG3H: CONFIGURATION REGISTER 3 HIGH
P = Programmable bit
P2BMX
R/P-1
(1)
(2)
T3CMX
R/P-1
Preliminary
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
HFOFST
(2)
(1)
R/P-1
CCP3MX
R/P-1
2010 Microchip Technology Inc.
PBADEN
R/P-1
CCP2MX
R/P-1
bit 0
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