PIC18F67J11T-I/PT Microchip Technology, PIC18F67J11T-I/PT Datasheet - Page 148

• Manufacturer Part Number: PIC18F67J11T-I/PT
• Description: IC PIC MCU FLASH 64KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F67J11T-I/PT

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Type: FLASH
• Ram Size: 3930 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 3930Byte
• Cpu Speed: 48MHz
• No. Of Timers: 5
• No. Of Pwm: RoHS Compliant
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3904 B
• Interface Type: EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 68
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 15 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162091 - HEADER MPLAB ICD2 18F87J11 64/80MA180020 - MODULE PLUG-IN HPC EXPL 18F87J11AC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18F67J11T-I/PTTR

PIC18F87J10
FIGURE 10-4:
TABLE 10-21: REGISTERS ASSOCIATED WITH PARALLEL SLAVE PORT
DS39663D-page 146
PORTD
LATD
TRISD
PORTE
LATE
TRISE
PSPCON
INTCON
PIR1
PIE1
IPR1
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the Parallel Slave Port.
Name
PORTD<7:0>
PSPIF
OBF
GIE/GIEH PEIE/GIEL
CS
WR
RD
IBF
TRISD7
TRISE7
LATD7
LATE7
PSPIE
PSPIP
PSPIF
Bit 7
RD7
RE7
IBF
PARALLEL SLAVE PORT READ WAVEFORMS
Q1
TRISD6
TRISE6
LATD6
LATE6
ADIF
ADIE
ADIP
Bit 6
RD6
OBF
RE6
Q2
TMR0IE
TRISD5
TRISE5
LATD5
LATE5
RC1IE
RC1IP
RC1IF
IBOV
Q3
Bit 5
RD5
RE5
Q4
PSPMODE
Preliminary
TRISD4
TRISE4
LATD4
INT0IE
LATE4
TX1IE
TX1IP
TX1IF
Bit 4
RD4
RE4
Q1
TRISD3
TRISE3
SSP1IE
SSP1IP
Q2
SSP1IF
LATD3
LATE3
RBIE
Bit 3
RD3
RE3
—
Q3
TRISD2
TMR0IF
CCP1IF
CCP1IE
CCP1IP
TRISE2
LATD2
LATE2
Bit 2
RD2
RE2
—
Q4
TRISD1
TMR2IF
TMR2IE
TMR2IP
TRISE1
Q1
LATD1
INT0IF
LATE1
© 2006 Microchip Technology Inc.
Bit 1
RD1
RE1
—
Q2
TRISD0
TMR1IF
TMR1IE
TMR1IP
TRISE0
LATD0
LATE0
RBIF
Bit 0
RD0
RE0
—
Q3
on page
Values
Reset
Q4
52
52
52
52
52
52
51
49
51
51
51