ATTINY26-16PU Atmel, ATTINY26-16PU Datasheet - Page 92

IC AVR MCU 2K 16MHZ IND 20-DIP

ATTINY26-16PU

Manufacturer Part Number
ATTINY26-16PU
Description
IC AVR MCU 2K 16MHZ IND 20-DIP
Manufacturer
Atmel
Series
AVR® ATtinyr
Datasheets

Specifications of ATTINY26-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ATTINY2x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
2-Wire/ISP/SM-Bus/SPI/UART/USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
16
Number Of Timers
2
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
11-ch x 10-bit
Package
20PDIP
Device Core
AVR
Family Name
ATtiny
Maximum Speed
16 MHz
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK505 - ADAPTER KIT FOR 14PIN AVR MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
92
ATtiny26(L)
• Bit 4 – ACI: Analog Comparator Interrupt Flag
This bit is set (one) when a comparator output event triggers the interrupt mode defined by ACI1
and ACI0. The Analog Comparator Interrupt routine is executed if the ACIE bit is set (one) and
the I-bit in SREG is set (one). ACI is cleared by hardware when executing the corresponding
interrupt handling vector. Alternatively, ACI is cleared by writing a logic one to the flag.
• Bit 3 – ACIE: Analog Comparator Interrupt Enable
When the ACIE bit is set (one) and the I-bit in the Status Register is set (one), the Analog Com-
parator interrupt is activated. When cleared (zero), the interrupt is disabled.
• Bit 2 – ACME: Analog Comparator Multiplexer Enable
When the ACME bit is set (one) and the ADC is switched off (ADEN in ADCSR is zero),
MUX3...0 in ADMUX select the input pin to replace the negative input to the Analog Comparator,
as shown in Table 42 on page 93. If ACME is cleared (zero) or ADEN is set (one), PA7(AIN1) is
applied to the negative input to the Analog Comparator.
• Bits 1, 0 – ACIS1, ACIS0: Analog Comparator Interrupt Mode Select
These bits determine which comparator events that trigger the Analog Comparator interrupt. The
different settings are shown in Table 41.
Table 41. ACIS1/ACIS0 Settings
Note:
ACIS1
0
0
1
1
1. When changing the ACIS1/ACIS0 bits, the Analog Comparator Interrupt must be disabled by
clearing its Interrupt Enable bit in the ACSR Register. Otherwise an interrupt can occur when
the bits are changed.
ACIS0
0
1
0
1
Interrupt Mode
Comparator Interrupt on Output Toggle
Reserved
Comparator Interrupt on Falling Output Edge
Comparator Interrupt on Rising Output Edge
(1)
1477K–AVR–08/10

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