PIC16F628A-I/ML Microchip Technology, PIC16F628A-I/ML Datasheet - Page 40
![IC MCU FLASH 2KX14 EEPROM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16F628A-I/ML
Manufacturer Part Number
PIC16F628A-I/ML
Description
IC MCU FLASH 2KX14 EEPROM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F627A-IP.pdf
(180 pages)
2.PIC16F627A-IP.pdf
(22 pages)
3.PIC16F648A-ISS.pdf
(178 pages)
Specifications of PIC16F628A-I/ML
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Controller Family/series
PIC16F
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
No. Of Timers
3
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
224 B
Interface Type
SCI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
16
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT28QFN3 - SOCKET TRAN ICE 18DIP/28QFNI3DBF648 - BOARD DAUGHTER ICEPIC3AC164033 - ADAPTER 28QFN TO 18DIPAC162053 - HEADER INTERFACE ICD,ICD2 18DIPDV007003 - PROGRAMMER UNIVERSAL PROMATE II
Data Converters
-
Lead Free Status / Rohs Status
Details
- Current page: 40 of 180
- Download datasheet (3Mb)
PIC16F627A/628A/648A
FIGURE 5-11:
DS40044G-page 40
RBPU
CCP1CON
CCP output
Data Bus
WR PORTB
WR TRISB
Peripheral OE
RD TRISB
RD PORTB
Note
CCP In
1:
Peripheral OE (output enable) is only active if
peripheral select is active.
(2)
TRIS Latch
Data Latch
D
D
CK
CK
BLOCK DIAGRAM OF
RB3/CCP1 PIN
Q
Q
Schmitt
Q
Q
Trigger
Q
EN
0
1
D
TTL
Input
Buffer
V
P
DD
V
Weak
Pull-up
V
DD
SS
CCP1
RB3/
© 2009 Microchip Technology Inc.
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