AT32UC3L064-D3UR Atmel, AT32UC3L064-D3UR Datasheet - Page 732
AT32UC3L064-D3UR
Manufacturer Part Number
AT32UC3L064-D3UR
Description
MCU AVR32 64KB FLASH 48TLLGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3L-EK.pdf
(858 pages)
Specifications of AT32UC3L064-D3UR
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TLLGA
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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31.3.4
31.3.4.1
31.3.4.2
31.3.4.3
32099F–11/2010
Product Dependencies
Power Management
Clocks
Interrupt
selectable by OCD Registers, minimizing the chance that the AUX port will need to be shared
with an application.
Table 31-6.
In order to use this module, other parts of the system must be configured correctly, as described
below.
The OCD clock operates independently of the CPU clock. If enabled in the Power Manager, the
OCD clock (CLK_OCD) will continue running even if the CPU enters a sleep mode that disables
the CPU clock.
The OCD has a clock (CLK_OCD) running synchronously with the CPU clock. This clock is gen-
erated by the Power Manager. The clock is enabled at reset, and can be disabled by writing to
the Power Manager.
The OCD system interrupt request lines are connected to the interrupt controller. Using the OCD
interrupts requires the interrupt controller to be programmed first.
Pin Name
MCKO
MDO[5:0]
MSEO[1:0]
EVTI_N
EVTO_N
Auxiliary Port Signals
Pin Description
Trace data output clock
Trace data output
Trace frame control
Event In
Event Out
Direction
Output
Output
Output
Output
Input
AT32UC3L016/32/64
Active Level
Low
Low
Digital
Digital
Digital
Digital
Digital
Type
732
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