PIC16C62B-20I/SO Microchip Technology, PIC16C62B-20I/SO Datasheet - Page 18
![IC MCU OTP 2KX14 PWM 28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC16C62B-20I/SO
Manufacturer Part Number
PIC16C62B-20I/SO
Description
IC MCU OTP 2KX14 PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F818-ISO.pdf
(6 pages)
2.PIC16C62B-04SO.pdf
(120 pages)
3.PIC16C62B-04SO.pdf
(5 pages)
4.PIC16C62A-04SP.pdf
(337 pages)
Specifications of PIC16C62B-20I/SO
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
External
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC16C
No. Of I/o's
22
Ram Memory Size
128Byte
Cpu Speed
20MHz
No. Of Timers
3
No. Of Pwm
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C62B-20I/SO
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
PIC16C62B-20I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC16C62B/72A
2.5
The INDF register is not a physical register. Address-
ing INDF actually addresses the register whose
address is contained in the FSR register (FSR is a
pointer ).
Reading INDF itself indirectly (FSR = 0) will produce
00h. Writing to the INDF register indirectly results in a
no-operation (although STATUS bits may be affected).
A simple program to clear RAM locations 20h-2Fh
using indirect addressing is shown in Example 2-1.
FIGURE 2-3:
DS35008B-page 18
RP1:RP0
bank select
(1)
Note 1: Maintain clear for upward compatibility with future products.
Indirect Addressing, INDF and FSR
Registers
2: Not implemented.
location select
6
Direct Addressing
DIRECT/INDIRECT ADDRESSING
Data
Memory
from opcode
00h
7Fh
Bank 0
00
0
80h
FFh
Bank 1
01
Preliminary
100h
17Fh
Bank 2
10
(2)
not used
EXAMPLE 2-1:
NEXT
CONTINUE
An effective 9-bit address is obtained by concatenating
the 8-bit FSR register and the IRP bit (STATUS<7>), as
shown in Figure 2-3. However, IRP is not used in the
PIC16C62B/72A.
180h
1FFh
Bank 3
11
(2)
IRP
movlw
movwf
clrf
incf
btfss
goto
:
(1)
bank select
HOW TO CLEAR RAM
USING INDIRECT
ADDRESSING
0x20
FSR
INDF
FSR
FSR,4 ;all done?
NEXT
7
Indirect Addressing
1999 Microchip Technology Inc.
;initialize pointer
;
;clear INDF register
;inc pointer
;NO, clear next
;YES, continue
FSR register
to RAM
location select
0