PIC18F65J10-I/PT Microchip Technology, PIC18F65J10-I/PT Datasheet - Page 396

• Manufacturer Part Number: PIC18F65J10-I/PT
• Description: IC PIC MCU FLASH 16KX16 64TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F65J10-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 64-TFQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 11x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI/I2C/EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 5
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 11-ch x 10-bit
• Package: 64TQFP
• Device Core: PIC
• Family Name: PIC18
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 2.5|3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180015 - MODULE PLUG-IN 18F87J10 FOR HPCAC162062 - HEADER INTRFC MPLAB ICD2 64/80PAC164327 - MODULE SKT FOR 64TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F87J10
Timing Diagrams and Specifications
Top-of-Stack Access .......................................................... 59
TRISE Register
TSTFSZ ............................................................................ 329
Two-Speed Start-up ................................................. 277, 285
Two-Word Instructions
TXSTAx Register
V
V
Voltage Reference Specifications .................................... 356
Voltage Regulator (On-Chip) ............................................ 284
W
Watchdog Timer (WDT) ........................................... 277, 283
WCOL ...................................................... 222, 223, 224, 227
WCOL Status Flag ................................... 222, 223, 224, 227
WWW Address ................................................................. 395
WWW, On-Line Support ....................................................... 4
X
XORLW ............................................................................ 329
XORWF ............................................................................ 330
DS39663D-page 394
DDCORE
Transition for Wake from Sleep (HSPLL) ................... 39
Transition from RC_RUN Mode to PRI_RUN Mode .. 38
Transition from SEC_RUN Mode to PRI_RUN Mode
Transition to RC_RUN Mode ..................................... 38
AC Characteristics
Capture/Compare/PWM Requirements (Including ECCP
CLKO and I/O Requirements ........................... 361, 362
EUSART Synchronous Receive Requirements ....... 375
EUSART Synchronous Transmission Requirements .....
Example SPI Mode Requirements (Master Mode, CKE =
Example SPI Mode Requirements (Master Mode, CKE =
Example SPI Mode Requirements (Slave Mode, CKE =
Example SPI Slave Mode Requirements (CKE = 1) 370
External Clock Requirements .................................. 359
I
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements ............................ 366
PLL Clock ................................................................. 360
Program Memory Write Requirements .................... 363
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Timer0 and Timer1 External Clock Requirements ... 365
PSPMODE Bit .......................................................... 144
Example Cases .......................................................... 63
BRGH Bit ................................................................. 239
Associated Registers ............................................... 283
Control Register ....................................................... 283
During Oscillator Failure .......................................... 286
Programming Considerations .................................. 283
2
2
C Bus Data Requirements (Slave Mode) .............. 372
C Bus Start/Stop Bits Requirements (Slave Mode) .....
/V
(HSPLL) ............................................................. 37
Internal RC Accuracy ....................................... 360
Modules) .......................................................... 366
375
0) ...................................................................... 367
1) ...................................................................... 368
0) ...................................................................... 369
371
er-up Timer and Brown-out Reset Requirements ..
364
CAP
Pin ........................................................... 284
2
2
C Bus Data Requirements ................ 374
C Bus Start/Stop Bits Requirements . 373
Preliminary
© 2006 Microchip Technology Inc.