PIC16LF1947-I/PT Microchip Technology, PIC16LF1947-I/PT Datasheet - Page 100

IC MCU 8BIT FLASH 64TQFP

PIC16LF1947-I/PT

Manufacturer Part Number
PIC16LF1947-I/PT
Description
IC MCU 8BIT FLASH 64TQFP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16LF1947-I/PT

Program Memory Type
FLASH
Program Memory Size
28KB (16K x 14)
Package / Case
64-TFQFP
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 17x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
EUSART/I2C/SPI
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
54
Number Of Timers
5
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005
Minimum Operating Temperature
- 40 C
On-chip Adc
17-ch x 10-bit
A/d Bit Size
10 bit
A/d Channels Available
17
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC16F/LF1946/47
7.5.8
The PIR3 register contains the interrupt flag bits, as
shown in
REGISTER 7-8:
DS41414B-page 100
bit 7
Legend:
R = Readable bit
u = Bit is unchanged
‘1’ = Bit is set
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0/0
Register
PIR3 REGISTER
Unimplemented: Read as ‘0’
CCP5IF: CCP5 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP4IF: CCP4 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
CCP3IF: CCP3 Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
TMR6IF: TMR6 to PR6 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
TMR4IF: TMR4 to PR4 Match Interrupt Flag bit
1 = Interrupt is pending
0 = Interrupt is not pending
Unimplemented: Read as ‘0’
7-8.
R/W-0/0
CCP5IF
PIR3: PERIPHERAL INTERRUPT REQUEST REGISTER 3
W = Writable bit
x = Bit is unknown
‘0’ = Bit is cleared
R/W-0/0
CCP4IF
R/W-0/0
CCP3IF
Preliminary
U = Unimplemented bit, read as ‘0’
-n/n = Value at POR and BOR/Value at all other Resets
R/W-0/0
TMR6IF
Note:
Interrupt flag bits are set when an interrupt
condition occurs, regardless of the state of
its corresponding enable bit or the Global
Enable bit, GIE, of the INTCON register.
User
appropriate interrupt flag bits are clear prior
to enabling an interrupt.
R/W-0/0
software
 2010 Microchip Technology Inc.
R/W-0/0
TMR4IF
should
ensure
R/W-0/0
bit 0
the

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