PIC16F73T-E/SS Microchip Technology, PIC16F73T-E/SS Datasheet - Page 302
![IC MCU FLASH 4KX14 A/D 28SSOP](/photos/6/81/68119/150-28-ssop_sml.jpg)
PIC16F73T-E/SS
Manufacturer Part Number
PIC16F73T-E/SS
Description
IC MCU FLASH 4KX14 A/D 28SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16F818-ISO.pdf
(6 pages)
4.PIC16F73-ISP.pdf
(174 pages)
5.PIC16F73-ISP.pdf
(14 pages)
6.PIC16F73-ISP.pdf
(12 pages)
Specifications of PIC16F73T-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16F73TE/SS
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16F818-ISO PDF datasheet #3
- PIC16F73-ISP PDF datasheet #4
- PIC16F73-ISP PDF datasheet #5
- PIC16F73-ISP PDF datasheet #6
- Current page: 302 of 688
- Download datasheet (3Mb)
PICmicro MID-RANGE MCU FAMILY
17.4.2
DS31017A-page 17-26
GCEN (SSPCON2<7>)
SDA
SCL
SSPIF
SSPOV (SSPCON1<6>)
BF (SSPSTAT<0>)
General Call Address Support
S
The addressing procedure for the I
usually determines which device will be the slave addressed by the master. The exception is the
general call address which can address all devices. When this address is used, all devices
should, in theory, respond with an acknowledge.
The general call address is one of eight addresses reserved for specific purposes by the I
tocol. It consists of all 0’s with R/W = 0.
The general call address is recognized when the General Call Enable bit (GCEN) is enabled
(SSPCON2<7> set). Following a start-bit detect, 8-bits are shifted into SSPSR and the address
is compared against SSPADD, and is also compared to the general call address, fixed in hard-
ware.
If the general call address matches, the SSPSR is transferred to the SSPBUF, the BF flag bit is
set (eight bit), and on the falling edge of the ninth bit (ACK bit) the SSPIF interrupt flag bit is set.
When the interrupt is serviced. The source for the interrupt can be checked by reading the con-
tents of the SSPBUF to determine if the address was device specific or a general call address.
In 10-bit mode, the SSPADD is required to be updated for the second half of the address to
match, and the UA bit is set (SSPSTAT<1>). If the general call address is sampled when the
GCEN bit is set while the slave is configured in 10-bit address mode, then the second half of the
address is not necessary, the UA bit will not be set, and the slave will begin receiving data after
the acknowledge
Figure 17-16: Slave Mode General Call Address Sequence (7 or 10-bit Address Mode)
1
2
General Call Address
3
(Figure
4
5
17-16).
6
Preliminary
7
R/W = 0
2
C bus is such that the first byte after the START condition
8
ACK
Address is compared to General Call Address
after ACK, set interrupt
9
D7
1
D6
2
Cleared in software
SSPBUF is read
Receiving data
D5
3
D4
4
D3
5
1997 Microchip Technology Inc.
D2
6
D1
7
D0
8
ACK
9
'0'
'1'
2
C pro-
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