ATMEGA165PV-8AUR Atmel, ATMEGA165PV-8AUR Datasheet - Page 120

• Manufacturer Part Number: ATMEGA165PV-8AUR
• Description: MCU AVR 16KB FLASH 8MHZ 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA165PV-8AUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8019K–AVR–11/10
Table 14-3
correct or the phase and frequency correct, PWM mode.
Table 14-3.
Note:
• Bit 1:0 – WGM1[1:0]: Waveform Generation Mode
Combined with the WGM1[3:2] bits found in the TCCR1B Register, these bits control the count-
ing sequence of the counter, the source for maximum (TOP) counter value, and what type of
waveform generation to be used, see
the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC)
mode, and three types of Pulse Width Modulation (PWM) modes.
page 109.
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
0
0
1
1
shows the COM1x[1:0] bit functionality when the WGM1[3:0] bits are set to the phase
“Phase Correct PWM Mode” on page 113.
Compare Output Mode, Phase Correct and Phase and Frequency Correct
PWM
(1)
COM1A0/COM1B0
0
1
0
1
Table 14-4 on page
Description
Normal port operation, OC1A/OC1B disconnected.
WGM1[3:0] = 9 or 11: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match when up-
counting. Set OC1A/OC1B on Compare Match when
downcounting.
Set OC1A/OC1B on Compare Match when up-
counting. Clear OC1A/OC1B on Compare Match
when downcounting.
for more details.
121. Modes of operation supported by
See “Modes of Operation” on
ATmega165P
See
120