atmega165pv ATMEL Corporation, atmega165pv Datasheet

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atmega165pv

Manufacturer Part Number
atmega165pv
Description
Atmega165p 8-bit Avr Microcontroller With 16k Bytes In-system Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet

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Features
Notes:
High Performance, Low Power AVR
Advanced RISC Architecture
High Endurance Non-volatile Memory segments
JTAG (IEEE std. 1149.1 compliant) Interface
Peripheral Features
Special Microcontroller Features
I/O and Packages
Speed Grade:
Temperature range:
Ultra-Low Power Consumption
– 130 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
– On-Chip 2-cycle Multiplier
– 16K Bytes of In-System Self-programmable Flash program memory
– 512 Bytes EEPROM
– 1K Bytes Internal SRAM
– Write/Erase cyles: 10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85°C/100 years at 25°C
– Optional Boot Code Section with Independent Lock Bits
– Programming Lock for Software Security
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
– Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Four PWM Channels
– 8-channel, 10-bit ADC
– Programmable Serial USART
– Master/Slave SPI Serial Interface
– Universal Serial Interface with Start Condition Detector
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated Oscillator
– External and Internal Interrupt Sources
– Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby
– 54 Programmable I/O Lines
– 64-lead TQFP and 64-pad QFN/MLF
– ATmega165PV: 0 - 4 MHz @ 1.8 - 5.5V, 0 - 8 MHz @ 2.7 - 5.5V
– ATmega165P: 0 - 8 MHz @ 2.7 - 5.5V, 0 - 16 MHz @ 4.5 - 5.5V
– -40°C to 85°C Industrial
– Active Mode:
– Power-down Mode:
– Power-save Mode:
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
1 MHz, 1.8V: 330 µA
32 kHz, 1.8V: 10 µA (including Oscillator)
0.1 µA at 1.8V
0.6 µA at 1.8V(Including 32 kHz RTC)
1. Worst case temperature. Guaranteed after last write cycle.
2. Failure rate less than 1 ppm.
3. Characterized through accelerated tests.
®
8-Bit Microcontroller
(1)(3)
(2)(3)
8-bit
Microcontroller
with 16K Bytes
In-System
Programmable
Flash
ATmega165P
ATmega165PV
Preliminary
Summary
8019IS–AVR–08/07

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atmega165pv Summary of contents

Page 1

... Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby • I/O and Packages – 54 Programmable I/O Lines – 64-lead TQFP and 64-pad QFN/MLF • Speed Grade: – ATmega165PV MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega165P MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Temperature range: – -40°C to 85°C Industrial • Ultra-Low Power Consumption – ...

Page 2

Pin Configurations Figure 1-1. Note: 1.1 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device ...

Page 3

Overview The ATmega165P is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By execut- ing powerful instructions in a single clock cycle, the ATmega165P achieves throughputs approaching 1 MIPS per MHz allowing the system designer ...

Page 4

The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction executed in ...

Page 5

Port B (PB7:PB0) Port 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B ...

Page 6

... AREF This is the analog reference pin for the A/D Converter. 3. Resources A comprehensive set of development tools, application notes and datasheets are available for download on http://www.atmel.com/avr. 8019IS–AVR–08/07 , even if the ADC is not used. If the ADC is used, it should be connected ...

Page 7

Register Summary Address Name Bit 7 (0xFF) Reserved – (0xFE) Reserved – (0xFD) Reserved – (0xFC) Reserved – (0xFB) Reserved – (0xFA) Reserved – (0xF9) Reserved – (0xF8) Reserved – (0xF7) Reserved – (0xF6) Reserved – (0xF5) Reserved – ...

Page 8

Address Name Bit 7 (0xBF) Reserved – (0xBE) Reserved – (0xBD) Reserved – (0xBC) Reserved – (0xBB) Reserved – (0xBA) USIDR (0xB9) USISR USISIF (0xB8) USICR USISIE (0xB7) Reserved – (0xB6) ASSR – (0xB5) Reserved – (0xB4) Reserved – (0xB3) ...

Page 9

Address Name Bit 7 (0x7D) Reserved – (0x7C) ADMUX REFS1 (0x7B) ADCSRB – (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved – (0x76) Reserved – (0x75) Reserved – (0x74) Reserved – (0x73) Reserved – (0x72) Reserved – (0x71) Reserved ...

Page 10

Address Name Bit 7 0x1B (0x3B) Reserved – 0x1A (0x3A) Reserved – 0x19 (0x39) Reserved – 0x18 (0x38) Reserved – 0x17 (0x37) TIFR2 – 0x16 (0x36) TIFR1 – 0x15 (0x35) TIFR0 – 0x14 (0x34) PORTG – 0x13 (0x33) DDRG – ...

Page 11

Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract ...

Page 12

Mnemonics Operands BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register ...

Page 13

Mnemonics Operands PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break 8019IS–AVR–08/07 Description STACK ← ← STACK (see specific descr. for Sleep ...

Page 14

... Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 64M1 64-pad 1.0 mm body, lead pitch 0.50 mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF) 8019IS–AVR–08/07 (2) Ordering Code Package ATmega165PV-8AU 64A ATmega165PV-8MU 64M1 ATmega165P-16AU 64A ATmega165P-16MU 64M1 and Figure 26-2 on page 304. ...

Page 15

Packaging Information 7.1 64A PIN 0°~7° L Notes: 1.This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 ...

Page 16

Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...

Page 17

Errata 8.1 ATmega165P Rev known errata. 8.2 ATmega165P Rev Not sampled. 8019IS–AVR–08/07 ATmega165P 17 ...

Page 18

Datasheet Revision History Please note that the referring page numbers in this section are referring to this document. The referring revision in this section are referring to the document revision. 9.1 Rev. I 08/ ...

Page 19

Rev. D 07/ 9.7 Rev. C 06/ 9.8 Rev. B 04/ 9.9 Rev. A 03/06 1. 8019IS–AVR–08/07 Updated “Register Description” on page Updated “Fast PWM ...

Page 20

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2007 Atmel Corporation. All rights reserved. Atmel marks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia ...

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