AT32UC3L032-ZAUT Atmel, AT32UC3L032-ZAUT Datasheet - Page 471
AT32UC3L032-ZAUT
Manufacturer Part Number
AT32UC3L032-ZAUT
Description
IC MCU AVR32 32KB FLASH 48VQFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3L-EK.pdf
(858 pages)
Specifications of AT32UC3L032-ZAUT
Core Processor
AVR
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, PWM, WDT
Number Of I /o
36
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.62 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
36
Number Of Timers
7
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL
Development Tools By Supplier
AT32UC3L-EK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 9 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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21.8
21.8.1
21.8.2
32099F–11/2010
Functional Description
Transfer Format
Operation
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte
must be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
Figure 21-4 on page
Each transfer begins with a START condition and terminates with a STOP condition (see
ure 21-4 on page
Figure 21-3.
Figure 21-4. Transfer Format
The TWIM has two modes of operation:
The master is the device which starts and stops a transfer and generates the TWCK clock.
These modes are described in the following chapters.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
• Master transmitter mode
• Master receiver mode
TWD
TWCK
START and STOP Conditions
Start
471).
471).
Address
TWCK
TWD
R/W
Start
Ack
Data
Ack
AT32UC3L016/32/64
Data
Stop
Ack
Stop
Fig-
471
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