PIC18F8310-E/PT Microchip Technology, PIC18F8310-E/PT Datasheet - Page 23
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PIC18F8310-E/PT
Manufacturer Part Number
PIC18F8310-E/PT
Description
IC PIC MCU FLASH 8KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC18F6310-IPT.pdf
(412 pages)
2.PIC18F6310-IPT.pdf
(16 pages)
3.PIC18F6310-IPT.pdf
(4 pages)
4.PIC18F6310-IPT.pdf
(28 pages)
5.PIC18F6310-IPT.pdf
(6 pages)
6.PIC18F6310-IPT.pdf
(4 pages)
Specifications of PIC18F8310-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
80-TFQFP
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F8310-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 5-3
© 2007 Microchip Technology Inc.
DEBUG
CP
EBTR
DEV10:DEV3
DEV2:DEV0
REV4:REV0
Note 1:
Bit Name
Unimplemented in PIC18F8410/8490/8493 family devices; maintain the default unprogrammed value.
PIC18F8410/8490/8493 FAMILYCONFIGURATION BIT DESCRIPTIONS (CONTINUED)
Configuration
CONFIG4L
CONFIG5L
CONFIG7L
DEVID2
DEVID1
DEVID1
Words
PIC18F8410/8490/8493 FAMILY
1 = Background debugger disabled
0 = Background debugger enabled
Code Protection bit (code memory area 0000h-3FFFh for
PIC18FX410/X490/X493 devices and 0000h-1FFFh for
PIC18FX310/X390/X393 devices)
1 = Code memory not code-protected
0 = Code memory code-protected
Table Read Protection bit (code memory area 0000h-3FFFh for
PIC18FX410/X490/X493 devices and 0000h-1FFFh for
PIC18FX310/X390/X393 devices)
1 = Code memory not protected from table reads executed in external
0 = Code memory protected from table reads executed in external
These bits are used with the DEV2:DEV0 bits in the DEVID1 register to
identify part number.
These bits are used with the DEV10:DEV3 bits in the DEVID2 register to
identify part number.
Background Debugger Enable bit
Device ID bits
Device ID bits
These bits are used to indicate the revision of the device.
memory
memory
Description
DS39624C-page 23