ATMEGA162-16MUR Atmel, ATMEGA162-16MUR Datasheet - Page 20
![MCU AVR 16KB FLASH 16MHZ 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA162-16MUR
Manufacturer Part Number
ATMEGA162-16MUR
Description
MCU AVR 16KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA162-16MUR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
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- Download datasheet (6Mb)
EEPROM Read/Write
Access
The EEPROM Address
Register – EEARH and
EEARL
20
ATmega162/V
“Memory Programming” on page 231
in SPI, JTAG, or Parallel Programming mode.
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in
the user software detect when the next byte can be written. If the user code contains instructions
that write the EEPROM, some precautions must be taken. In heavily filtered power supplies, V
is likely to rise or fall slowly on Power-up/down. This causes the device for some period of time
to run at a voltage lower than specified as minimum for the clock frequency used. See
ing EEPROM Corruption” on page 24
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
• Bits 15..9 – Res: Reserved Bits
These bits are reserved bits in the ATmega162 and will always read as zero.
• Bits 8..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
511. The initial value of EEAR is undefined. A proper value must be written before the EEPROM
may be accessed.
Bit
Read/Write
Initial Value
EEAR7
R/W
15
R
X
–
7
0
EEAR6
R/W
14
R
X
–
6
0
EEAR5
R/W
13
R
X
–
5
0
contains a detailed description on EEPROM Programming
for details on how to avoid problems in these situations.
EEAR4
R/W
12
R
X
–
4
0
EEAR3
R/W
11
–
3
R
0
X
Table
EEAR2
R/W
10
R
–
2
0
X
1. A selftiming function, however, lets
EEAR1
R/W
R
9
–
1
0
X
EEAR8
EEAR0
R/W
R/W
8
0
X
X
EEARH
EEARL
2513K–AVR–07/09
“Prevent-
CC
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