AT89LP6440-20AU Atmel, AT89LP6440-20AU Datasheet - Page 19
AT89LP6440-20AU
Manufacturer Part Number
AT89LP6440-20AU
Description
MCU 8051 64K FLASH ISP 44TQFP
Manufacturer
Atmel
Series
89LPr
Specifications of AT89LP6440-20AU
Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Package
44TQFP
Device Core
8051
Family Name
89LP
Maximum Speed
20 MHz
Operating Supply Voltage
2.5|3.3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
38
Interface Type
2-Wire/SPI
On-chip Dac
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89LP6440-20AU
Manufacturer:
Cirrus
Quantity:
89
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3.4
3706A–MICRO–9/09
Extended Stack
Figure 3-11. MOVX with One Wait State (WS = 01B)
Figure 3-12. MOVX with Two Wait States (WS = 10B)
Figure 3-13. MOVX with Three Wait States (WS = 11B)
The AT89LP6440 provides an extended stack space for applications requiring additional stack
memory. By default the stack is located in the 256-byte IDATA space of internal data memory.
The IDATA stack is referenced solely by the 8-bit Stack Pointer (SP: 81H). Setting the XSTK bit
in AUXR enables the extended stack. The extended stack resides in the EDATA space for up to
4KB of stack memory. The extended stack is referenced by a 12-bit pointer formed from SP and
the four LSBs of the Extended Stack Pointer (SPX: 9EH) as shown in
between both stacks. Note that the standard IDATA stack will not overflow to the EDATA stack
or vice versa. The stack and extended stack are mutually exclusive and SPX is ignored when
XTSK = 0. An application choosing to switch between stacks by toggling XSTK must maintain
CLK
ALE
CLK
ALE
CLK
ALE
WR
WR
WR
RD
RD
RD
P2
P0
P0
P2
P0
P0
P2
P0
P0
P2 SFR
P0 SFR
P0 SFR
P2 SFR
P0 SFR
P0 SFR
P2 SFR
P0 SFR
P0 SFR
S1
S1
S1
DPL OUT
DPL OUT
DPL OUT
DPL OUT
DPL OUT
DPL OUT
S2
S2
S2
S3
S3
S3
DPH or P2 OUT
DPH or P2 OUT
DATA OUT
FLOAT
W1
W1
W1
DPH or P2 OUT
DATA OUT
FLOAT
DATA OUT
FLOAT
W2
W2
S4
AT89LP6440 - Preliminary
P2 SFR
P0 SFR
P0 SFR
W3
S4
P2 SFR
P0 SFR
P0 SFR
S4
P2 SFR
P0 SFR
P0 SFR
Figure
3-14. SP is shared
19
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