PIC16C782-E/SS Microchip Technology, PIC16C782-E/SS Datasheet - Page 125

• Manufacturer Part Number: PIC16C782-E/SS
• Description: IC PIC MCU FLASH 8BIT 2K 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C782-E/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x8b; D/A 1x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 20-SSOP
• For Use With: XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

14.8
The Power Control/Status Register, PCON, has two
status bits that provide indication of which power-up
type RESET occurred.
PCON<0> is Brown-out Reset Status bit, BOR. Bit
BOR is set on a Power-on Reset. It must then be set by
the user and checked on subsequent RESETS to see
if bit BOR cleared, indicating a BOR occurred. How-
ever, if the brown-out circuitry is disabled, the BOR bit
is a "Don’t Care" bit and is considered unknown upon a
POR.
PCON<1> is POR (Power-on Reset Status bit). It is
cleared on a Power-on Reset and unaffected other-
wise. The user must set this bit following a Power-on
Reset.
When the CPU is running under the INTRC oscillator
mode, the frequency of the INTRC oscillator can be
switched to a power saving 37 kHz (nominal) mode.
TABLE 14-3:
XT, HS, LP
EC, RC, INTRC
Oscillator Configuration
2001 Microchip Technology Inc.
Power Control/Status Register
(PCON)
TIME-OUT IN VARIOUS SITUATIONS
T
PWRT
PWRTE = 0
T
+ 1024T
PWRT
Power-up
OSC
Preliminary
PWRTE = 1
1024T
—
Clearing the OSCF (PCON<3>) enables oscillation at
37kHz, setting OSCF returns the oscillator to operation
at 4MHz.
The Watchdog Timer is a free running, on-chip dedi-
cated oscillator and timer, which does not require any
external components to operate. The WDT provides a
system RESET in the event that software does not exe-
cute a CLRWDT instruction within a specified interval.
For reliability, the WDT will run even if the CPU clock
has been stopped (for example, by the execution of a
SLEEP instruction).
During normal operation, a WDT time-out generates a
device RESET (Watchdog Timer Reset). If the device is
in SLEEP mode, a WDT time-out causes the device to
awaken and resume normal operation (Watchdog
Timer Wake-up).
The WDT can be enabled either by setting the WDTE
bit in the configuration register during programming, or
by setting the WDTON bit (PCON<4>).
OSC
T
PWRT
PIC16C781/782
Brown-out
T
+ 1024T
PWRT
OSC
DS41171A-page 123
Wake-up from
1024T
SLEEP
—
OSC