PIC16C782-E/SS Microchip Technology, PIC16C782-E/SS Datasheet - Page 126
![IC PIC MCU FLASH 8BIT 2K 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16C782-E/SS
Manufacturer Part Number
PIC16C782-E/SS
Description
IC PIC MCU FLASH 8BIT 2K 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16C781-ISO.pdf
(186 pages)
2.PIC16C781-ISO.pdf
(8 pages)
3.PIC16C781-ISO.pdf
(8 pages)
Specifications of PIC16C782-E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x8b; D/A 1x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
For Use With
XLT20SS1-1 - SOCKET TRANSITION 20DIP 20SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
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PIC16C781/782
REGISTER 14-2:
TABLE 14-4:
DS41171A-page 124
POR
0
0
0
1
1
1
1
1
bit 7-5
bit 4
bit 3
bit 2
bit 1
bit 0
BOR
1
x
x
0
1
1
1
1
STATUS BITS AND THEIR SIGNIFICANCE
TO
1
0
x
1
0
0
u
1
POWER CONTROL REGISTER (PCON: 8Eh)
Unimplemented: Read as '0'
WDTON: WDT Software Enable bit
If WDTE bit (Configuration Word <3>) = 1:
This bit is not writable, always reads ‘1’
If WDTE bit (Configuration Word <3>) = 0:
1 = WDT is enabled
0 = WDT is disabled and cleared
OSCF: Oscillator Speed bit (pending on new internal oscillator decision)
INTRC mode:
1 = 4 MHz typical
0 = 37 kHz typical
All other oscillator modes:
Ignored
Unimplemented: Read as '0'
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set in software after a Brown-out Reset occurs)
Legend:
R = Readable bit
- n = Value at POR
x = Bit is unknown
bit 7
U-0
PD
—
1
x
0
1
1
0
u
0
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
U-0
—
U-0
—
Preliminary
W = Writable bit
’1’ = Bit is set
’q’ = Value depends on condition
WDTON
R/W-q
Bit Significance
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
OSCF
U-0
—
2001 Microchip Technology Inc.
R/W-q
POR
R/W-x
BOR
bit 0
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