PIC16LF628-04I/SS Microchip Technology, PIC16LF628-04I/SS Datasheet - Page 52
![IC MCU FLASH 2KX14 COMP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LF628-04I/SS
Manufacturer Part Number
PIC16LF628-04I/SS
Description
IC MCU FLASH 2KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16LF628-04I/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
4MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF628-04I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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PIC16F62X
8.0
Timer2 is an 8-bit timer with a prescaler and a
postscaler. It can be used as the PWM time-base for
PWM mode of the CCP module. The TMR2 register is
readable and writable, and is cleared on any device
RESET.
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The Timer2 module has an 8-bit Period Register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>)).
Timer2 can be shut off by clearing control bit TMR2ON
(T2CON<2>) to minimize power consumption.
Register 8-1 shows the Timer2 Control register.
DS40300C-page 50
or
TIMER2 MODULE
1:16,
OSC
selected
/4) has a prescale option of 1:1,
by
control
Preliminary
bits
8.1
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device RESET (Power-on Reset, MCLR
TMR2 is not cleared when T2CON is written.
8.2
The output of TMR2 (before the postscaler) is fed to the
Synchronous Serial Port module which optionally uses
it to generate shift clock.
FIGURE 8-1:
Note
Reset, Watchdog Timer Reset, or Brown-out
Reset)
Sets flag
bit TMR2IF
TOUTPS<3:0>
Postscaler
1:1
1:
Timer2 Prescaler and Postscaler
Output of TMR2
to
TMR2 register output can be software selected by the
SSP Module as a baud clock.
1:16
4
TMR2
output (1)
RESET
EQ
Comparator
TIMER2 BLOCK DIAGRAM
TMR2 reg
PR2 reg
2003 Microchip Technology Inc.
1:1, 1:4, 1:16
T2CKPS<1:0>
Prescaler
2
F
OSC
/4
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