PIC16LF628-04I/SS Microchip Technology, PIC16LF628-04I/SS Datasheet - Page 71
![IC MCU FLASH 2KX14 COMP 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LF628-04I/SS
Manufacturer Part Number
PIC16LF628-04I/SS
Description
IC MCU FLASH 2KX14 COMP 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheet
1.PIC16F627-04P.pdf
(170 pages)
Specifications of PIC16LF628-04I/SS
Core Size
8-Bit
Program Memory Size
3.5KB (2K x 14)
Oscillator Type
Internal
Core Processor
PIC
Speed
4MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
224 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
20-SSOP
Controller Family/series
PIC16LF
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
224Byte
Cpu Speed
20MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LF628-04I/SS
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
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12.1
The BRG supports both the Asynchronous and
Synchronous modes of the USART. It is a dedicated
8-bit baud rate generator. The SPBRG register controls
the period of a free running 8-bit timer. In Asynchro-
nous mode bit BRGH (TXSTA<2>) also controls the
baud rate. In Synchronous mode bit BRGH is ignored.
Table 12-1 shows the formula for computation of the
baud rate for different USART modes which only apply
in Master mode (internal clock).
Given the desired baud rate and Fosc, the nearest
integer value for the SPBRG register can be calculated
using the formula in Table 12-1. From this, the error in
baud rate can be determined.
Example 12-1 shows the calculation of the baud rate
error for the following conditions:
TABLE 12-1:
TABLE 12-2:
2003 Microchip Technology Inc.
0
1
Legend:
98h
18h
99h
Legend:
Address
SYNC
F
Desired Baud Rate = 9600
BRGH = 0
SYNC = 0
OSC
USART Baud Rate Generator
(BRG)
= 16 MHz
X = value in SPBRG (0 to 255)
x = unknown, - = unimplemented read as '0'.
Shaded cells are not used by the BRG.
TXSTA
RCSTA
SPBRG
Name
(Asynchronous) Baud Rate = F
(Synchronous) Baud Rate = F
BAUD RATE FORMULA
REGISTERS ASSOCIATED WITH BAUD RATE GENERATOR
Baud Rate Generator Register
CSRC
SPEN
Bit 7
BRGH = 0 (Low Speed)
Bit 6
RX9
TX9
SREN
TXEN
Bit 5
OSC
OSC
/(4(X+1))
CREN
SYNC
Bit 4
/(64(X+1))
Preliminary
ADEN
Bit 3
—
EXAMPLE 12-1:
It may be advantageous to use the high baud rate
(BRGH = 1) even for slower baud clocks. This is
because the F
baud rate error in some cases.
Writing a new value to the SPBRG register, causes the
BRG timer to be RESET (or cleared), this ensures the
BRG does not wait for a timer overflow before
outputting the new baud rate.
BRGH
FERR
Bit 2
Desired Baud rate = F
Calculated Baud Rate = 16000000 / (64(25 + 1))
Error = (Calculated Baud Rate = Desired Baud Rate)
Baud Rate= F
NA
9600 = 16000000 / (64( +1 ))X
X = î25.042°
= 9615
= (9615 - 9600)/ 9600
= 0.16%
OERR
TRMT
Bit 1
OSC
/(16(X + 1)) equation can reduce the
BRGH = 1 (High Speed)
RX9D
Bit 0
TX9D
Desired Baud Rate
CALCULATING BAUD
RATE ERROR
OSC
OSC
PIC16F62X
/ (64(X + 1))
0000 -010
0000 -00x
0000 0000
/(16(X+1))
Value on
POR
DS40300C-page 69
Value on all
0000 -010
0000 -00x
0000 0000
RESETS
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